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2020-11-03add spi wishbone slave with a simplified flash memory chip model and a test ↵Wojciech Kosior
bench
2020-10-10fix yosys synthesisWojciech Kosior
2020-10-08translate webasm block of instructions + put instruction names as comments ↵Wojciech Kosior
in generated code
2020-10-06add translation of relational operations and loopsWojciech Kosior
2020-10-06add some debugging facility inside the cpuWojciech Kosior
2020-10-06add relational operations to stack machineWojciech Kosior
2020-10-06add translation of br_if instructionWojciech Kosior
2020-10-05fixes, add_sp instruciton and translation of br instruction from wasmWojciech Kosior
2020-10-05fixes, conditional if-not jump and translation of if-else instruction from wasmWojciech Kosior
2020-09-22perform type checking of translated instructionsWojciech Kosior
2020-09-22on 'make clean' also delete .mem files compiled from .wasmWojciech Kosior
2020-09-21make running tests through Makefile more comfortableWojciech Kosior
2020-09-21point out the fact, that only one value type is supported for nowWojciech Kosior
2020-09-21use function pointer array in Wasm opcode translationWojciech Kosior
2020-09-21enable translation of few arithmetic operations (testbench included)Wojciech Kosior
2020-09-21fix memory verification in wasm_compile testsWojciech Kosior
2020-09-21fix leb decodingWojciech Kosior
2020-09-21put function call wasm_compile test in separate benchWojciech Kosior
2020-09-21prepare to perform wasm_compile tests a bit different from stack_machine testsWojciech Kosior
2020-09-19initial work towards translating wasm to stack machine (with a provisional ↵Wojciech Kosior
bench)
2020-09-16add function calling (call, ret and drop instructions) with a testbench + ↵Wojciech Kosior
bugfix in stack machine
2020-09-16also enable reading from vga text memoryWojciech Kosior
2020-09-16fix old commentsWojciech Kosior
2020-09-14update comment to reflect changesWojciech Kosior
2020-09-14add ability to make non-aligned loads/stores and loads/stores of 1 or 2 ↵Wojciech Kosior
bytes together with test bench
2020-09-14fix outdated information in commentsWojciech Kosior
2020-09-09enable byte-grained reads and writes through interface_wrapperWojciech Kosior
2020-09-09fix verification when SEL_O != 4'b1111Wojciech Kosior
2020-09-08enable slave and master models to use SEL_ signalWojciech Kosior
2020-09-08remove trailing whitespaceWojciech Kosior
2020-09-08Update READMEWojciech Kosior
2020-09-08modernize the build (test) systemWojciech Kosior
2020-09-08remove old debugging codeWojciech Kosior
2020-09-08use new machine's instructions in synthesisWojciech Kosior
2020-09-07remove old version of stack machine from the projectWojciech Kosior
2020-09-07update soc toplevel module to use new version of stack machineWojciech Kosior
2020-09-07add wrapped stack machine with benchWojciech Kosior
2020-09-07add intercon module, that encapsulates slave_dispatcher and master_arbiter ↵Wojciech Kosior
and a bench for it (use adapted operations files from master_arbiter test)
2020-09-07fix port directionsWojciech Kosior
2020-09-07rename intercon to slave_dispatcher (soc module will remporarily stop ↵Wojciech Kosior
working from this commit on)
2020-09-07add a wishbone arbiter for 2 mastersWojciech Kosior
2020-09-07add wrapper from wb master interface with 32-bit data port to wb interface ↵Wojciech Kosior
with 16-bit data port together with testbench
2020-09-05add cond_jump instruction together with benchWojciech Kosior
2020-09-05add jump instruction together with benchWojciech Kosior
2020-09-05add mul instruction together with benchWojciech Kosior
2020-09-05add div instruction together with benchWojciech Kosior
2020-09-05put procedures in tclasm.tcl in some orderWojciech Kosior
2020-09-05add swap instruction together with benchWojciech Kosior
2020-09-05add sub instruction together with benchWojciech Kosior
2020-09-05add add instruction together with benchWojciech Kosior
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