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authorWojciech Kosior <kwojtus@protonmail.com>2020-09-07 19:30:24 +0200
committerWojciech Kosior <kwojtus@protonmail.com>2020-09-07 19:30:24 +0200
commit28d8e73f293e11ac3d92c1186fd51d155297d10d (patch)
tree6a3a682604f18e1540a45024e66b7451bf57736b /tests/master_arbiter/operations1.memv
parenteb0c405f4122d416cb416b46d514278ea7dcddbf (diff)
downloadAGH-engineering-thesis-28d8e73f293e11ac3d92c1186fd51d155297d10d.tar.gz
AGH-engineering-thesis-28d8e73f293e11ac3d92c1186fd51d155297d10d.zip
add intercon module, that encapsulates slave_dispatcher and master_arbiter and a bench for it (use adapted operations files from master_arbiter test)
Diffstat (limited to 'tests/master_arbiter/operations1.memv')
-rw-r--r--tests/master_arbiter/operations1.memv34
1 files changed, 17 insertions, 17 deletions
diff --git a/tests/master_arbiter/operations1.memv b/tests/master_arbiter/operations1.memv
index 1900676..57057c2 100644
--- a/tests/master_arbiter/operations1.memv
+++ b/tests/master_arbiter/operations1.memv
@@ -5,13 +5,13 @@
`WRITE(30000, 03e8)
`WAIT
`READ (30000, 03e8)
-`WRITE(30005, 0403)
+`WRITE(50005, 0403)
`WAIT
`WAIT
`WAIT
-`WRITE(30120, 0120)
-`READ (30005, 0403)
-`READ (30120, 0120)
+`WRITE(50120, 0120)
+`READ (50005, 0403)
+`READ (50120, 0120)
`DESELECT
`WAIT
`WAIT
@@ -163,28 +163,28 @@
`WAIT
`WAIT
`READ (b0005, 22ef)
-`WRITE(3001a, 0a1b)
+`WRITE(0001a, 0a1b)
// Only values written until this point will also be checked by master 0
`DESELECT
-`READ (3001a, 0a1b)
+`READ (0001a, 0a1b)
// Let's force some interleaved single operations by both masters
-`WRITE(3001c, 0a1b)
+`WRITE(4001c, 0a1b)
`DESELECT
-`WRITE(3003e, 2c3d)
+`WRITE(9003e, 2c3d)
`DESELECT
-`READ (3003e, 2c3d)
+`READ (9003e, 2c3d)
`DESELECT
-`READ (3001c, 0a1b)
+`READ (4001c, 0a1b)
`DESELECT
-`WRITE(30050, 4e5f)
+`WRITE(d0050, 4e5f)
`DESELECT
-`WRITE(30072, 6071)
+`WRITE(20072, 6071)
`DESELECT
-`READ (30072, 6071)
+`READ (20072, 6071)
`DESELECT
-`READ (30050, 4e5f)
+`READ (d0050, 4e5f)
`DESELECT
-// See comment at the end of master 0's operations - we do it analogoulys here
+// See comment at the end of master 0's operations - we do it analogously here
`READ (00000, abcd)
-`READ (01010, a2a2)
-`READ (00001, 4321)
+`READ (a1010, a2a2)
+`READ (50001, 4321)