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author | Wojciech Kosior <kwojtus@protonmail.com> | 2020-09-03 17:41:44 +0200 |
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committer | Wojciech Kosior <kwojtus@protonmail.com> | 2020-09-03 17:41:44 +0200 |
commit | 43f4e586acf76f3ec08d5892ba784ba6ac5d1932 (patch) | |
tree | 98713aeb990856c6b7a8682236d50ec3c4d5f01f /design | |
parent | 3c7da9cdf1e69a6a0a64cb99ddbf2d0695000391 (diff) | |
download | AGH-engineering-thesis-43f4e586acf76f3ec08d5892ba784ba6ac5d1932.tar.gz AGH-engineering-thesis-43f4e586acf76f3ec08d5892ba784ba6ac5d1932.zip |
add the ability to synthesize the design
Diffstat (limited to 'design')
-rw-r--r-- | design/pins.pcf | 65 | ||||
-rwxr-xr-x | design/rom.s.tcl | 54 |
2 files changed, 119 insertions, 0 deletions
diff --git a/design/pins.pcf b/design/pins.pcf new file mode 100644 index 0000000..fabcd9c --- /dev/null +++ b/design/pins.pcf @@ -0,0 +1,65 @@ +set_io clock_100mhz J3 + +set_io button1 K11 # actually used as reset +set_io button2 P13 + +set_io led1 M12 +set_io led2 R16 + +set_io vga_hs J4 +set_io vga_vs H2 +set_io vga_red[0] F3 +set_io vga_red[1] H5 +set_io vga_red[2] E3 +set_io vga_green[0] H6 +set_io vga_green[1] F2 +set_io vga_green[2] H3 +set_io vga_blue[0] G2 +set_io vga_blue[1] H4 +set_io vga_blue[2] F1 + +set_io sram_addr[0] N6 +set_io sram_addr[1] T1 +set_io sram_addr[2] P4 +set_io sram_addr[3] R2 +set_io sram_addr[4] N5 +set_io sram_addr[5] T2 +set_io sram_addr[6] P5 +set_io sram_addr[7] R3 +set_io sram_addr[8] R5 +set_io sram_addr[9] T3 +set_io sram_addr[10] R4 +set_io sram_addr[11] M7 +set_io sram_addr[12] N7 +set_io sram_addr[13] P6 +set_io sram_addr[14] M8 +set_io sram_addr[15] T5 +set_io sram_addr[16] R6 +set_io sram_addr[17] P8 + +set_io sram_io[0] T8 +set_io sram_io[1] P7 +set_io sram_io[2] N9 +set_io sram_io[3] T9 +set_io sram_io[4] M9 +set_io sram_io[5] R9 +set_io sram_io[6] K9 +set_io sram_io[7] P9 +set_io sram_io[8] R10 +set_io sram_io[9] L10 +set_io sram_io[10] P10 +set_io sram_io[11] N10 +set_io sram_io[12] T10 +set_io sram_io[13] T11 +set_io sram_io[14] T15 +set_io sram_io[15] T14 + +set_io sram_cs_n T6 +set_io sram_oe_n L9 +set_io sram_we_n T7 + +# SPI to on-board chip +#set_io sdo P12 +#set_io sdi P11 +#set_io sck R11 +#set_io ss_n R12 diff --git a/design/rom.s.tcl b/design/rom.s.tcl new file mode 100755 index 0000000..db142a0 --- /dev/null +++ b/design/rom.s.tcl @@ -0,0 +1,54 @@ +#!/usr/bin/env tclsh + +source tclasm.tcl + +## also look at stack_machine_cond_jump test + +## we're going to write numbers from 0 to 639 at addresses h100000 to h1009FC +## and then write non-zero value at h100A00 + +# this will translate to 3 16-bit instructions +set_sp h0FFFFC + +## set up the counter +# each of those 2 will translate to 1 16-bit instruction +const 0 +stack down + +## this is the point we later jump to, address 10 + +tee +## compute address: counter * 4 + h100000 +stack down +const 4 +mul +const h100000 +add +stack up +## load computed address to im +exchange_im +## save value of counter at address pointed by im +swap +store +swap +## increase counter by 1 +const 1 +add +## compare value of counter to 640 +tee +stack down +const 640 +sub +stack up +## loop if counter != 640 +cond_jump 10 + +## write hFFFFFFFF to address h100A00 (the point is to write a non-zero value +## there, but because our stack machine only knows how to write 32-bit values +## to memory, we'll write to h100A00 and h100A02, both being mapped as the +## VGA power-on register - what matters is the later write, so at least one of +## higher 16 bits of written value has to be non-zero) +const -1 +store@ h100A00 + +halt |