index
:
AGH-engineering-thesis
master
Code related to my engineering thesis at AGH University of Science and Technology in Kraków, Poland
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
tests
Age
Commit message (
Collapse
)
Author
2020-09-03
rename tclasm.tcl to tclasm_old.tcl (prepare for redesign of the stack machine)
Wojciech Kosior
2020-09-03
treat embedded RAM as read-only in test bench
Wojciech Kosior
2020-09-03
rename stack_machine to stack_machine_old (prepare for redesign of the machine)
Wojciech Kosior
2020-09-02
add a VGA-based bench for entire sock
Wojciech Kosior
2020-09-02
name correction: remove "wb" from "sram_wb_slave"
Wojciech Kosior
2020-09-02
add bench for embedded ram wishbone slave
Wojciech Kosior
2020-09-02
add bench for wishbone sram wrapper
Wojciech Kosior
2020-09-02
add bench for cond_jump instruction
Wojciech Kosior
2020-09-02
add bench for swap instruction
Wojciech Kosior
2020-09-02
remove old debugging code
Wojciech Kosior
2020-09-02
Add bench for tee instruction
Wojciech Kosior
2020-09-02
add bench for jump instruction
Wojciech Kosior
2020-09-01
remove old debugging code
Wojciech Kosior
2020-09-01
fix line counting in test model (avoid having picture shifted 1 line down on ↵
Wojciech Kosior
virtual display)
2020-09-01
start anew
Wojciech Kosior
[prev]