diff options
Diffstat (limited to 'tests/slave_dispatcher/test.v')
-rw-r--r-- | tests/slave_dispatcher/test.v | 90 |
1 files changed, 78 insertions, 12 deletions
diff --git a/tests/slave_dispatcher/test.v b/tests/slave_dispatcher/test.v index 49c03ef..ad85b1f 100644 --- a/tests/slave_dispatcher/test.v +++ b/tests/slave_dispatcher/test.v @@ -26,16 +26,26 @@ module slave_dispatcher_test(); wire M_WE_O; wire M_STALL_I; - wire S0_ACK_O, S1_ACK_O, S2_ACK_O, S3_ACK_O; - wire S0_CLK_I, S1_CLK_I, S2_CLK_I, S3_CLK_I; - wire [17:0] S0_ADR_I, S1_ADR_I, S2_ADR_I, S3_ADR_I; - wire [15:0] S0_DAT_I, S1_DAT_I, S2_DAT_I, S3_DAT_I; - wire [15:0] S0_DAT_O, S1_DAT_O, S2_DAT_O, S3_DAT_O; - wire S0_SEL_I, S1_SEL_I, S2_SEL_I, S3_SEL_I; /* Always high */ - wire S0_RST_I, S1_RST_I, S2_RST_I, S3_RST_I; - wire S0_STB_I, S1_STB_I, S2_STB_I, S3_STB_I; - wire S0_WE_I, S1_WE_I, S2_WE_I, S3_WE_I; - wire S0_STALL_O, S1_STALL_O, S2_STALL_O, S3_STALL_O; + wire S0_ACK_O, S1_ACK_O, S2_ACK_O, + S3_ACK_O, S4_ACK_O, S5_ACK_O; + wire S0_CLK_I, S1_CLK_I, S2_CLK_I, + S3_CLK_I, S4_CLK_I, S5_CLK_I; + wire [17:0] S0_ADR_I, S1_ADR_I; + wire [16:0] S2_ADR_I, S3_ADR_I, S4_ADR_I, S5_ADR_I; + wire [15:0] S0_DAT_I, S1_DAT_I, S2_DAT_I, + S3_DAT_I, S4_DAT_I, S5_DAT_I; + wire [15:0] S0_DAT_O, S1_DAT_O, S2_DAT_O, + S3_DAT_O, S4_DAT_O, S5_DAT_O; + wire S0_SEL_I, S1_SEL_I, S2_SEL_I, + S3_SEL_I, S4_SEL_I, S5_SEL_I; /* Always high */ + wire S0_RST_I, S1_RST_I, S2_RST_I, + S3_RST_I, S4_RST_I, S5_RST_I; + wire S0_STB_I, S1_STB_I, S2_STB_I, + S3_STB_I, S4_STB_I, S5_STB_I; + wire S0_WE_I, S1_WE_I, S2_WE_I, + S3_WE_I, S4_WE_I, S5_WE_I; + wire S0_STALL_O, S1_STALL_O, S2_STALL_O, + S3_STALL_O, S4_STALL_O, S5_STALL_O; wire S_COMBINED_ACK_O; wire [19:0] S_COMBINED_ADR_I; @@ -105,7 +115,8 @@ module slave_dispatcher_test(); memory_slave_model #( - .SLAVE_NR(2) + .SLAVE_NR(2), + .ADR_BITS(17) ) slave2 ( .ACK_O(S2_ACK_O), @@ -122,7 +133,8 @@ module slave_dispatcher_test(); memory_slave_model #( - .SLAVE_NR(3) + .SLAVE_NR(3), + .ADR_BITS(17) ) slave3 ( .ACK_O(S3_ACK_O), @@ -137,6 +149,42 @@ module slave_dispatcher_test(); .STALL_O(S3_STALL_O) ); + memory_slave_model + #( + .SLAVE_NR(4), + .ADR_BITS(17) + ) slave4 + ( + .ACK_O(S4_ACK_O), + .CLK_I(CLK), + .ADR_I(S4_ADR_I), + .DAT_I(S4_DAT_I), + .DAT_O(S4_DAT_O), + .SEL_I(S4_SEL_I), + .RST_I(RST), + .STB_I(S4_STB_I), + .WE_I(S4_WE_I), + .STALL_O(S4_STALL_O) + ); + + memory_slave_model + #( + .SLAVE_NR(3), + .ADR_BITS(17) + ) slave5 + ( + .ACK_O(S5_ACK_O), + .CLK_I(CLK), + .ADR_I(S5_ADR_I), + .DAT_I(S5_DAT_I), + .DAT_O(S5_DAT_O), + .SEL_I(S5_SEL_I), + .RST_I(RST), + .STB_I(S5_STB_I), + .WE_I(S5_WE_I), + .STALL_O(S5_STALL_O) + ); + slave_dispatcher dispatcher ( .CLK(CLK), @@ -174,6 +222,22 @@ module slave_dispatcher_test(); .S3_WE_I(S3_WE_I), .S3_STALL_O(S3_STALL_O), + .S4_ACK_O(S4_ACK_O), + .S4_ADR_I(S4_ADR_I), + .S4_DAT_I(S4_DAT_I), + .S4_DAT_O(S4_DAT_O), + .S4_STB_I(S4_STB_I), + .S4_WE_I(S4_WE_I), + .S4_STALL_O(S4_STALL_O), + + .S5_ACK_O(S5_ACK_O), + .S5_ADR_I(S5_ADR_I), + .S5_DAT_I(S5_DAT_I), + .S5_DAT_O(S5_DAT_O), + .S5_STB_I(S5_STB_I), + .S5_WE_I(S5_WE_I), + .S5_STALL_O(S5_STALL_O), + .S_COMBINED_ACK_O(S_COMBINED_ACK_O), .S_COMBINED_ADR_I(S_COMBINED_ADR_I), .S_COMBINED_DAT_I(S_COMBINED_DAT_I), @@ -196,6 +260,8 @@ module slave_dispatcher_test(); assign S1_SEL_I = 1; assign S2_SEL_I = 1; assign S3_SEL_I = 1; + assign S4_SEL_I = 1; + assign S5_SEL_I = 1; integer i; |