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authorWojciech Kosior <kwojtus@protonmail.com>2020-09-07 19:30:24 +0200
committerWojciech Kosior <kwojtus@protonmail.com>2020-09-07 19:30:24 +0200
commit28d8e73f293e11ac3d92c1186fd51d155297d10d (patch)
tree6a3a682604f18e1540a45024e66b7451bf57736b /tests/stack_machine_old_multiinstructions_load_store
parenteb0c405f4122d416cb416b46d514278ea7dcddbf (diff)
downloadAGH-engineering-thesis-28d8e73f293e11ac3d92c1186fd51d155297d10d.tar.gz
AGH-engineering-thesis-28d8e73f293e11ac3d92c1186fd51d155297d10d.zip
add intercon module, that encapsulates slave_dispatcher and master_arbiter and a bench for it (use adapted operations files from master_arbiter test)
Diffstat (limited to 'tests/stack_machine_old_multiinstructions_load_store')
0 files changed, 0 insertions, 0 deletions