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authorWojciech Kosior <kwojtus@protonmail.com>2020-09-05 18:57:00 +0200
committerWojciech Kosior <kwojtus@protonmail.com>2020-09-05 18:57:00 +0200
commit92206c93690c5658928c9f8b1324e1a455e1a453 (patch)
tree317283feedacfa01f5ad2340c20bfea3e42b86b4 /design
parentf37a50d6cfe86e6f5ebe368c0868878fd72aa884 (diff)
downloadAGH-engineering-thesis-92206c93690c5658928c9f8b1324e1a455e1a453.tar.gz
AGH-engineering-thesis-92206c93690c5658928c9f8b1324e1a455e1a453.zip
add cond_jump instruction together with bench
Diffstat (limited to 'design')
-rw-r--r--design/stack_machine.v11
1 files changed, 11 insertions, 0 deletions
diff --git a/design/stack_machine.v b/design/stack_machine.v
index 150f6c7..b6c2706 100644
--- a/design/stack_machine.v
+++ b/design/stack_machine.v
@@ -220,6 +220,10 @@ module stack_machine_new
assign instr_mul = !set_im && !use_im && stack_shrinks_by_1 &&
instruction[11:0] == 12'd3;
+ wire instr_cond_jump;
+ assign instr_cond_jump = use_im && stack_shrinks_by_1 &&
+ instruction[11:7] == 5'd1;
+
reg halt; /* Set once a halt instruction is encountered */
assign finished = halt;
@@ -519,6 +523,13 @@ module stack_machine_new
if (instr_mul && arithmetic_uncompleted)
r1 <= r0 * r1;
+
+ if (instr_cond_jump && arithmetic_uncompleted) begin
+ r1 <= r0;
+
+ if (r1)
+ `SET_PC(im_effective);
+ end
end // case: STEP_EXECUTING
endcase // case (step)
end // else: !if(RST_I)