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authorWojciech Kosior <kwojtus@protonmail.com>2020-09-05 17:58:56 +0200
committerWojciech Kosior <kwojtus@protonmail.com>2020-09-05 17:58:56 +0200
commit2c528314ebe29a1c94b6c03fd1b0e2668ee25dff (patch)
tree834eba7d51db338f7ebd898b49039b15ffa5d477 /design
parent9c0a347262ad5aa8564570ac672450b3e46c8570 (diff)
downloadAGH-engineering-thesis-2c528314ebe29a1c94b6c03fd1b0e2668ee25dff.tar.gz
AGH-engineering-thesis-2c528314ebe29a1c94b6c03fd1b0e2668ee25dff.zip
add div instruction together with bench
Diffstat (limited to 'design')
-rw-r--r--design/stack_machine.v49
1 files changed, 46 insertions, 3 deletions
diff --git a/design/stack_machine.v b/design/stack_machine.v
index 0ccc1c6..4313713 100644
--- a/design/stack_machine.v
+++ b/design/stack_machine.v
@@ -208,10 +208,43 @@ module stack_machine_new
assign instr_sub = !set_im && !use_im && stack_shrinks_by_1 &&
instruction[11:0] == 12'd1;
+ wire instr_udiv;
+ assign instr_udiv = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd2;
+
reg halt; /* Set once a halt instruction is encountered */
assign finished = halt;
+
+ /* module for division */
+ wire [31:0] div_quotient;
+ wire [31:0] div_remainder;
+ wire div_done;
+
+ div
+ #(
+ .WIDTH(32)
+ ) div
+ (
+ .clock(CLK_I),
+ .start(step == STEP_EXECUTING && first_execution_tick),
+ .dividend(r0),
+ .divisor(r1),
+
+ .quotient(div_quotient),
+ .remainder(div_remainder),
+ .done(div_done)
+ );
+
+
+ reg arithmetic_uncompleted;
+ wire arithmetic_completes;
+ assign arithmetic_completes = instr_udiv ? div_done :
+ instr_halt ? 0 :
+ 1;
+
+
always @*
I_ADR_O = pc / 2;
@@ -284,6 +317,8 @@ module stack_machine_new
I_CYC_O <= 0;
end
+ arithmetic_uncompleted <= 1;
+
first_execution_tick <= 1;
load_store_unrequested <= 0;
stack_transfer_unrequested <= 2'b0;
@@ -293,12 +328,17 @@ module stack_machine_new
STEP_EXECUTING : begin
first_execution_tick <= 0;
+ if (arithmetic_completes)
+ arithmetic_uncompleted <= 0;
+
if (((stack_grows || stack_shrinks || load || store) &&
first_execution_tick) ||
(load_store_uncompleted &&
!data_command_completes) ||
(stack_transfer_uncompleted[1] &&
- !stack_transfer_completes[1]) || halt) begin
+ !stack_transfer_completes[1]) ||
+ (arithmetic_uncompleted &&
+ !arithmetic_completes)) begin
step <= STEP_EXECUTING; /* Remain where we are */
end else begin
step <= STEP_LOADING_INSTRUCTION;
@@ -457,11 +497,14 @@ module stack_machine_new
r1 <= im_effective;
/* Instructions, that shrink stack */
- if (instr_add && first_execution_tick)
+ if (instr_add && arithmetic_uncompleted)
r1 <= r0 + r1;
- if (instr_sub && first_execution_tick)
+ if (instr_sub && arithmetic_uncompleted)
r1 <= r0 - r1;
+
+ if (instr_udiv && arithmetic_uncompleted)
+ r1 <= div_quotient;
end // case: STEP_EXECUTING
endcase // case (step)
end // else: !if(RST_I)