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authorWojtek Kosior <kwojtus@protonmail.com>2020-01-03 17:08:06 +0100
committerWojtek Kosior <kwojtus@protonmail.com>2020-01-03 17:08:06 +0100
commit814d4a5357d849c4988422d48afa4aaa5432ce78 (patch)
tree77f4a169332f017873e64dcadbd7ed3467140c3f /uart.h
parent42ad29d6475cc63797be5042b90e8b09fc8d93b9 (diff)
downloadrpi-MMU-example-814d4a5357d849c4988422d48afa4aaa5432ce78.tar.gz
rpi-MMU-example-814d4a5357d849c4988422d48afa4aaa5432ce78.zip
write to peripheral registers like humans
Diffstat (limited to 'uart.h')
-rw-r--r--uart.h22
1 files changed, 11 insertions, 11 deletions
diff --git a/uart.h b/uart.h
index 892ba0e..72f7f94 100644
--- a/uart.h
+++ b/uart.h
@@ -47,59 +47,59 @@ int getchar_non_blocking(void);
static inline _Bool uart_irq_pending(void)
{
return
- ((uint32_t) 1 << 25) & *(uint32_t volatile*) ARM_IRQ_PENDING_2;
+ ((uint32_t) 1 << 25) & rd32(ARM_IRQ_PENDING_2);
}
static inline void uart_irq_disable(void)
{
// Mask uart in arm peripheral interrupts
- *(uint32_t volatile*) ARM_DISABLE_IRQS_2 = ((uint32_t) 1 << 25);
+ wr32(ARM_DISABLE_IRQS_2, ((uint32_t) 1) << 25);
}
static inline void uart_irq_enable(void)
{
// Unmask uart in arm peripheral interrupts
- *(uint32_t volatile*) ARM_ENABLE_IRQS_2 = ((uint32_t) 1 << 25);
+ wr32(ARM_ENABLE_IRQS_2, ((uint32_t) 1) << 25);
}
static inline _Bool uart_recv_irq_pending(void)
{
- return ((uint32_t) 1 << 4) & *(uint32_t volatile*) PL011_UART_MIS;
+ return (1 << 4) & rd32(PL011_UART_MIS);
}
static inline void uart_recv_irq_disable(void)
{
- *(uint32_t volatile*) PL011_UART_IMSC &= ~(1 << 4);
+ wr32(PL011_UART_IMSC, rd32(PL011_UART_IMSC) & ~(1 << 4));
}
static inline void uart_recv_irq_enable(void)
{
- *(uint32_t volatile*) PL011_UART_IMSC |= (1 << 4);
+ wr32(PL011_UART_IMSC, rd32(PL011_UART_IMSC) | (1 << 4));
}
static inline void uart_clear_recv_irq(void)
{
- *(uint32_t volatile*) PL011_UART_ICR = (1 << 4);
+ wr32(PL011_UART_ICR, (1 << 4));
}
static inline _Bool uart_send_irq_pending(void)
{
- return ((uint32_t) 1 << 5) & *(uint32_t volatile*) PL011_UART_MIS;
+ return (1 << 5) & rd32(PL011_UART_MIS);
}
static inline void uart_send_irq_disable(void)
{
- *(uint32_t volatile*) PL011_UART_IMSC &= ~(1 << 5);
+ wr32(PL011_UART_IMSC, rd32(PL011_UART_IMSC) & ~(1 << 5));
}
static inline void uart_send_irq_enable(void)
{
- *(uint32_t volatile*) PL011_UART_IMSC |= (1 << 5);
+ wr32(PL011_UART_IMSC, rd32(PL011_UART_IMSC) | (1 << 5));
}
static inline void uart_clear_send_irq(void)
{
- *(uint32_t volatile*) PL011_UART_ICR = (1 << 5);
+ wr32(PL011_UART_ICR, (1 << 5));
}
#endif // UART_H