Merge branch 'bob' of https://repo.or.cz/RPi-MMU-example into alice

1 files changed, 29 insertions, 1 deletions

diff --git a/kernel.c b/kernel.c
index f5a2b2e..c5918a1 100644
--- a/kernel.c
+++ b/kernel.c
@@ -8,6 +8,12 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags)
   (void) atags;
 
   uart_init();
+
+  // When we attach screen session after loading kernel with socat
+  // we miss kernel's greeting... So we'll make the kernel wait for
+  // one char we're going to send from within screen
+  uart_getc();
+  
   uart_puts("Hello, kernel World!\r\n");
 
   uint32_t ID_MMFR0;
@@ -16,7 +22,7 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags)
 
   char *paging;
 
-  switch(ID_MMFR0 & 7) /* lowest 4 bits indicate VMSA support */ {
+  switch(ID_MMFR0 & 0xf) /* lowest 4 bits indicate VMSA support */ {
   case 0 : paging = "no paging\n\r"; break;
   case 1 : paging = "implementation defined paging\n\r"; break;
   case 2 : paging = "VMSAv6, with cache and TLB type registers\n\r"; break;
@@ -27,6 +33,28 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags)
   }
 
   uart_puts(paging);
+
+  uint32_t CPSR;
+  // get content of current program status register to check the current
+  // processor mode
+  asm("mrs %0, cpsr" : "=r" (CPSR) :: "memory");
+
+  char *mode;
+  
+  switch(CPSR & 0x1f) /* lowest 5 bits indicate processor mode */ {
+  case 0x10 : mode = "User (PL0)"; break;
+  case 0x11 : mode = "FIQ (PL1)"; break;
+  case 0x12 : mode = "IRQ (PL1)"; break;
+  case 0x13 : mode = "Supervisor (PL1)"; break;
+  case 0x16 : mode = "Monitor (PL1)"; break;
+  case 0x17 : mode = "Abort (PL1)"; break;
+  case 0x1a : mode = "Hyp (PL2)"; break;
+  case 0x1b : mode = "Undefined (PL1)"; break;
+  case 0x1f : mode = "System (PL1)"; break;
+  default : mode = "Unknown mode"; break;
+  }
+
+  uart_puts(mode);
   
   while (1)
     uart_putc(uart_getc());