From 35fceb4649a142a9936355bfa090f8e8ce22f9fd Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Tue, 15 Oct 2019 17:26:58 +0200 Subject: delay greeting message in kernel --- kernel.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'kernel.c') diff --git a/kernel.c b/kernel.c index 5960b15..555aa47 100644 --- a/kernel.c +++ b/kernel.c @@ -11,6 +11,12 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags) (void) atags; uart_init(); + + // When we attach screen session after loading kernel with socat + // we miss kernel's greeting... So we'll make the kernel wait for + // one char we're going to send from within screen + uart_getc(); + uart_puts("Hello, kernel World!\r\n"); uint32_t ID_MMFR0; -- cgit v1.2.3 From f2f81de9973b5a3028eb6cbbaf3942cc68446f9b Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Tue, 22 Oct 2019 16:28:47 +0200 Subject: check current execution mode --- kernel.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'kernel.c') diff --git a/kernel.c b/kernel.c index 555aa47..b387a10 100644 --- a/kernel.c +++ b/kernel.c @@ -36,6 +36,28 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags) } uart_puts(paging); + + uint32_t CPSR; + // get content of current program status register to check the current + // processor mode + asm("mrs %0, cpsr" : "=r" (CPSR) :: "memory"); + + char *mode; + + switch(CPSR & 0x1f) /* lowest 5 bits indicate processor mode */ { + case 0x10 : mode = "User (PL0)"; break; + case 0x11 : mode = "FIQ (PL1)"; break; + case 0x12 : mode = "IRQ (PL1)"; break; + case 0x13 : mode = "Supervisor (PL1)"; break; + case 0x16 : mode = "Monitor (PL1)"; break; + case 0x17 : mode = "Abort (PL1)"; break; + case 0x1a : mode = "Hyp (PL2)"; break; + case 0x1b : mode = "Undefined (PL1)"; break; + case 0x1f : mode = "System (PL1)"; break; + default : mode = "Unknown mode"; break; + } + + uart_puts(mode); while (1) uart_putc(uart_getc()); -- cgit v1.2.3 From c68891456e3b3c4ad37c36293413405151b87951 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Tue, 22 Oct 2019 16:30:15 +0200 Subject: check actual 4 bits that indicate paging support (3 were being checed b4) --- kernel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'kernel.c') diff --git a/kernel.c b/kernel.c index b387a10..76b314d 100644 --- a/kernel.c +++ b/kernel.c @@ -25,7 +25,7 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags) char *paging; - switch(ID_MMFR0 & 7) /* lowest 4 bits indicate VMSA support */ { + switch(ID_MMFR0 & 0xf) /* lowest 4 bits indicate VMSA support */ { case 0 : paging = "no paging\n\r"; break; case 1 : paging = "implementation defined paging\n\r"; break; case 2 : paging = "VMSAv6, with cache and TLB type registers\n\r"; break; -- cgit v1.2.3