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author | vetch <vetch97@gmail.com> | 2020-01-02 17:49:42 +0100 |
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committer | vetch <vetch97@gmail.com> | 2020-01-02 17:49:42 +0100 |
commit | 8d08aa3662ed44ef2f4b35b1e79f44adaf3229c9 (patch) | |
tree | b803375047e56d8b9b0669e032a88edb18ff9d99 /kernel.c | |
parent | 5cb10bcc7d0c6d4159103f05ba228a09ca365fac (diff) | |
download | rpi-MMU-example-8d08aa3662ed44ef2f4b35b1e79f44adaf3229c9.tar.gz rpi-MMU-example-8d08aa3662ed44ef2f4b35b1e79f44adaf3229c9.zip |
update, may not work now
Diffstat (limited to 'kernel.c')
-rw-r--r-- | kernel.c | 34 |
1 files changed, 34 insertions, 0 deletions
@@ -2,7 +2,10 @@ #include "demo_functionality.h" #include "paging.h" #include "interrupts.h" +#include "strings.h" +#include "psr.h" +extern void enable_irq ( void ); void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags) { // Declare as unused @@ -54,6 +57,37 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags) uart_putc(*(int*)(0x40000034) ); *(int *)(0x40000034) = 1; + uint32_to_bits(*(int*)(0xE000ED24),buf); + uart_puts(buf); + uart_puts("\r\n"); + uint32_to_bits(*(int*)(0xE002ED24),buf); + uart_puts(buf); + uart_puts("\r\n"); + + int regVal; + asm("mrs %0, cpsr":"=r"(regVal):); + uint32_to_bits(regVal,buf); + uart_puts(buf); + uart_puts("\r\n"); + +// ; Read ICC_IGRPEN1 into Rt +// MCR p15,0,<Rt>,c12,c12,7 ; Write Rt to ICC_IGRPEN1 + + uint32_t ICC_IGRPEN1; + asm(" MRC p15,0, %0 ,c12,c12,7" : "=r"(ICC_IGRPEN1) :: "memory"); //READ FROM ICC_IGRPEN1 + + uint32_to_bits(ICC_IGRPEN1,buf); + uart_puts(buf); + uart_puts("\r\n"); + + + // uint32_to_bits(*(int*)(0x40000024),buf); +// uart_puts(buf); +// uart_puts("\r\n"); + +// *(int *)(0x7E00B210) = 1; +// *(int *)(0x7E00B214) = 1; +// *(int *)(0x7E00B218) = 1; // prints some info and sets up a section for PL0 code, loads a blob // there and jumps to it... never, ever, ever returns |