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author | vetch <vetch97@gmail.com> | 2020-01-02 17:49:42 +0100 |
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committer | vetch <vetch97@gmail.com> | 2020-01-02 17:49:42 +0100 |
commit | 8d08aa3662ed44ef2f4b35b1e79f44adaf3229c9 (patch) | |
tree | b803375047e56d8b9b0669e032a88edb18ff9d99 | |
parent | 5cb10bcc7d0c6d4159103f05ba228a09ca365fac (diff) | |
download | rpi-MMU-example-8d08aa3662ed44ef2f4b35b1e79f44adaf3229c9.tar.gz rpi-MMU-example-8d08aa3662ed44ef2f4b35b1e79f44adaf3229c9.zip |
update, may not work now
-rw-r--r-- | docs/interrupts.png | bin | 0 -> 38473 bytes | |||
-rw-r--r-- | interrupt_vector.S | 44 | ||||
-rw-r--r-- | interrupts.c | 32 | ||||
-rw-r--r-- | interrupts.h | 2 | ||||
-rw-r--r-- | kernel.c | 34 | ||||
-rw-r--r-- | psr.h | 2 | ||||
-rwxr-xr-x | readfromrpi.sh | 4 |
7 files changed, 108 insertions, 10 deletions
diff --git a/docs/interrupts.png b/docs/interrupts.png Binary files differnew file mode 100644 index 0000000..8973fa8 --- /dev/null +++ b/docs/interrupts.png diff --git a/interrupt_vector.S b/interrupt_vector.S index f71330b..3daef05 100644 --- a/interrupt_vector.S +++ b/interrupt_vector.S @@ -1,16 +1,42 @@ .section ".interrupt_vectors.text" .global abort_handler +.global irq_handler .local generic_handler .global _interrupt_vectors + _interrupt_vectors: - b generic_handler - b generic_handler - b generic_handler - b abort_handler_caller - b abort_handler_caller - b generic_handler - b generic_handler + ldr pc,reset_handler + ldr pc,undefined_handler + ldr pc,swi_handler + ldr pc,prefetch_handler + ldr pc,data_handler + ldr pc,unused_handler + ldr pc,irq_handler_caller + ldr pc,fiq_handler + reset_handler: .word abort + undefined_handler: .word abort + swi_handler: .word abort + prefetch_handler: .word abort + data_handler: .word abort + unused_handler: .word abort + irq_handler_caller: .word irq + fiq_handler: .word abort + //b abort_handler_caller + //b abort_handler_caller + //b abort_handler_caller + //b abort_handler_caller + //b abort_handler_caller + //b abort_handler_caller + //b abort_handler_caller + + +.globl enable_irq +enable_irq: + mrs r0,cpsr + bic r0,r0,#0x80 + msr cpsr_c,r0 + bx lr generic_handler: b generic_handler @@ -18,3 +44,7 @@ abort_handler_caller: mov sp, #0x8000 ldr r5, =abort_handler bx r5 +irq: + mov sp, #0x8000 + ldr r5, =abort_handler + subs pc,lr,#4
\ No newline at end of file diff --git a/interrupts.c b/interrupts.c index 191ce40..712cfb9 100644 --- a/interrupts.c +++ b/interrupts.c @@ -1,4 +1,5 @@ #include "uart.h" +#include "interrupts.h" /** @brief The undefined instruction interrupt handler @@ -22,5 +23,34 @@ __attribute__((interrupt("ABORT"))) __attribute__((section(".interrupt_vectors.text"))) abort_handler(void) { - system_reentry_point(); + uart_puts("nwm\r\n"); + + system_reentry_point(); +} + +/* Here is your interrupt function */ +void +__attribute__((interrupt("IRQ"))) +__attribute__((section(".interrupt_vectors.text"))) +irq_handler(void) { + /* You code goes here */ + uart_puts("GOT INTERRUPT!\r\n"); + + local_timer_clr_reload_reg_t temp = { .IntClear = 1, .Reload = 1 }; + QA7->TimerClearReload = temp; // Clear interrupt & reload } + +/* here is your main */ +int enable_timer(void) { + + QA7->TimerRouting.Routing = LOCALTIMER_TO_CORE0_IRQ; // Route local timer IRQ to Core0 + QA7->TimerControlStatus.ReloadValue = 100; // Timer period set + QA7->TimerControlStatus.TimerEnable = 1; // Timer enabled + QA7->TimerControlStatus.IntEnable = 1; // Timer IRQ enabled + QA7->TimerClearReload.IntClear = 1; // Clear interrupt + QA7->TimerClearReload.Reload = 1; // Reload now + QA7->Core0TimerIntControl.nCNTPNSIRQ_IRQ = 1; // We are in NS EL1 so enable IRQ to core0 that level + QA7->Core0TimerIntControl.nCNTPNSIRQ_FIQ = 0; // Make sure FIQ is zero + uart_puts("Enabled Timer\r\n"); + return(0); +}
\ No newline at end of file diff --git a/interrupts.h b/interrupts.h index 9f80668..e9ade80 100644 --- a/interrupts.h +++ b/interrupts.h @@ -121,7 +121,7 @@ struct __attribute__((__packed__, aligned(4))) QA7Registers { generic_timer_int_ctrl_reg_t Core2TimerIntControl; // 0x48 generic_timer_int_ctrl_reg_t Core3TimerIntControl; // 0x4C }; -#define QA7 ((volatile __attribute__((aligned(4))) struct QA7Registers*)(uintptr_t)(0x40000040)) +#define QA7 ((volatile __attribute__((aligned(4))) struct QA7Registers*)(uintptr_t)(0x40000024)) //40000040 int enable_timer(void); @@ -2,7 +2,10 @@ #include "demo_functionality.h" #include "paging.h" #include "interrupts.h" +#include "strings.h" +#include "psr.h" +extern void enable_irq ( void ); void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags) { // Declare as unused @@ -54,6 +57,37 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags) uart_putc(*(int*)(0x40000034) ); *(int *)(0x40000034) = 1; + uint32_to_bits(*(int*)(0xE000ED24),buf); + uart_puts(buf); + uart_puts("\r\n"); + uint32_to_bits(*(int*)(0xE002ED24),buf); + uart_puts(buf); + uart_puts("\r\n"); + + int regVal; + asm("mrs %0, cpsr":"=r"(regVal):); + uint32_to_bits(regVal,buf); + uart_puts(buf); + uart_puts("\r\n"); + +// ; Read ICC_IGRPEN1 into Rt +// MCR p15,0,<Rt>,c12,c12,7 ; Write Rt to ICC_IGRPEN1 + + uint32_t ICC_IGRPEN1; + asm(" MRC p15,0, %0 ,c12,c12,7" : "=r"(ICC_IGRPEN1) :: "memory"); //READ FROM ICC_IGRPEN1 + + uint32_to_bits(ICC_IGRPEN1,buf); + uart_puts(buf); + uart_puts("\r\n"); + + + // uint32_to_bits(*(int*)(0x40000024),buf); +// uart_puts(buf); +// uart_puts("\r\n"); + +// *(int *)(0x7E00B210) = 1; +// *(int *)(0x7E00B214) = 1; +// *(int *)(0x7E00B218) = 1; // prints some info and sets up a section for PL0 code, loads a blob // there and jumps to it... never, ever, ever returns @@ -60,7 +60,7 @@ inline static PSR_t read_CPSR(void) PSR_t CPSR; // get content of current program status register asm("mrs %0, cpsr" : "=r" (CPSR.raw) :: "memory"); - + return CPSR; } diff --git a/readfromrpi.sh b/readfromrpi.sh new file mode 100755 index 0000000..3ebc469 --- /dev/null +++ b/readfromrpi.sh @@ -0,0 +1,4 @@ +#!/bin/bash +sudo stty -F /dev/ttyUSB0 115200 cs8 -cstopb -parenb +sudo chmod 777 /dev/ttyUSB0 +#cat -v < /dev/ttyUSB0 |