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authorWojtek Kosior <kwojtus@protonmail.com>2019-10-07 08:41:34 +0200
committerWojtek Kosior <kwojtus@protonmail.com>2019-10-07 08:41:34 +0200
commitf755e0916a2a40a626d2e8819e303fbfcebb641d (patch)
tree9b5bb917cd5d67ce5f2ec53390916291f5df2f4d
parent41ad4c6268b0292464802d88ac6835d21e69cabb (diff)
parent9523d2fc13ef8c53cc0753c90293f6b7577e39a5 (diff)
downloadrpi-MMU-example-f755e0916a2a40a626d2e8819e303fbfcebb641d.tar.gz
rpi-MMU-example-f755e0916a2a40a626d2e8819e303fbfcebb641d.zip
merge paging support checking from bob
-rw-r--r--kernel.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/kernel.c b/kernel.c
index 2fd5d71..b30efe0 100644
--- a/kernel.c
+++ b/kernel.c
@@ -13,6 +13,26 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags)
uart_init();
uart_puts("Hello, kernel World!\r\n");
+ uint32_t ID_MMFR0;
+ // get contents of coprocessor register to check for paging support
+ asm("mrc p15, 0, %0, c0, c1, 4" : "=r" (ID_MMFR0));
+
+ char *paging;
+
+ uart_puts("hmmm\n\r");
+
+ switch(ID_MMFR0 & 7) /* lowest 4 bits indicate VMSA support */ {
+ case 0 : paging = "no paging\n\r"; break;
+ case 1 : paging = "implementation defined paging\n\r"; break;
+ case 2 : paging = "VMSAv6, with cache and TLB type registers\n\r"; break;
+ case 3 : paging = "VMSAv7, with support for remapping and access flag\n\r"; break;
+ case 4 : paging = "VMSAv7 with PXN bit supported\n\r"; break;
+ case 5 : paging = "VMSAv7, PXN and long format descriptors. EPAE is supported.\n\r"; break;
+ default : paging = "?_? unknown paging ?_?\n\r";
+ }
+
+ uart_puts(paging);
+
while (1)
uart_putc(uart_getc());
}