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authorJosselin Poiret <dev@jpoiret.xyz>2023-03-21 09:59:36 +0100
committerLudovic Courtès <ludo@gnu.org>2023-03-26 22:19:26 +0200
commit2a4fa1d127b28b05da08b930456a0c2e44d745c3 (patch)
tree23fcb999b5db5e597c04820bdf6d29b8ccfda3e4 /gnu/packages/firmware.scm
parentef7ddc8e8b19daf09e1198e1b577c366bdc7b270 (diff)
downloadguix-2a4fa1d127b28b05da08b930456a0c2e44d745c3.tar.gz
guix-2a4fa1d127b28b05da08b930456a0c2e44d745c3.zip
gnu: opensbi: Build with default gcc, with microarch rv64g.
* gnu/packages/firmware.scm (make-opensbi-package): Remove specific #:xgcc for the cross-toolchain, there is not reason for it now. Also set the microarch to rv64g, so that it builds. Signed-off-by: Ludovic Courtès <ludo@gnu.org>
Diffstat (limited to 'gnu/packages/firmware.scm')
-rw-r--r--gnu/packages/firmware.scm7
1 files changed, 6 insertions, 1 deletions
diff --git a/gnu/packages/firmware.scm b/gnu/packages/firmware.scm
index 956ece5d6d..0b7fff035a 100644
--- a/gnu/packages/firmware.scm
+++ b/gnu/packages/firmware.scm
@@ -486,7 +486,7 @@ provide OpenFirmware functionality on top of an already running system.")
(native-inputs
`(,@(if (and (not (string-prefix? "riscv64" (%current-system)))
(string-prefix? "riscv64" arch))
- `(("cross-gcc" ,(cross-gcc "riscv64-linux-gnu" #:xgcc gcc-7))
+ `(("cross-gcc" ,(cross-gcc "riscv64-linux-gnu"))
("cross-binutils" ,(cross-binutils "riscv64-linux-gnu")))
'())))
(arguments
@@ -499,6 +499,11 @@ provide OpenFirmware functionality on top of an already running system.")
`("CC=gcc"))
"FW_PAYLOAD=n"
"V=1")
+ ;; Direct __asm__ is used with fence.i instructions, which are not
+ ;; available in the generic riscv ISA. We need a micro-arch with
+ ;; support for it, and rv64g is the official ISA with support for
+ ;; fence.i.
+ #:configure-flags (list "-march=rv64g")
#:phases
(modify-phases %standard-phases
(delete 'configure)