| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2020-11-21 | increase number of wb slaves, that can be attached to the intercon | Wojciech Kosior | |
| 2020-09-08 | enable slave and master models to use SEL_ signal | Wojciech Kosior | |
| 2020-09-08 | modernize the build (test) system | Wojciech Kosior | |
| 2020-09-07 | rename intercon to slave_dispatcher (soc module will remporarily stop ↵ | Wojciech Kosior | |
| working from this commit on) | |||
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index : AGH-engineering-thesis | |
| Code related to my engineering thesis at AGH University of Science and Technology in Kraków, Poland |
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