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| author | Wojciech Kosior <kwojtus@protonmail.com> | 2020-11-03 19:16:12 +0100 |
|---|---|---|
| committer | Wojciech Kosior <kwojtus@protonmail.com> | 2020-11-03 19:16:12 +0100 |
| commit | cd0c787bcfc89a0a1e14f4404a59cb4697854621 (patch) | |
| tree | ea96fd360441b7c6f171b642016b68039283cc8a /tests/spi_slave/Makefile | |
| parent | 33f05839b7815a5a18a2b920dba4549d2bd7ce16 (diff) | |
| download | AGH-engineering-thesis-cd0c787bcfc89a0a1e14f4404a59cb4697854621.tar.gz AGH-engineering-thesis-cd0c787bcfc89a0a1e14f4404a59cb4697854621.zip | |
add spi wishbone slave with a simplified flash memory chip model and a test bench
Diffstat (limited to 'tests/spi_slave/Makefile')
| -rw-r--r-- | tests/spi_slave/Makefile | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/tests/spi_slave/Makefile b/tests/spi_slave/Makefile new file mode 100644 index 0000000..8a8d3e8 --- /dev/null +++ b/tests/spi_slave/Makefile @@ -0,0 +1,9 @@ +DEPENDS = operations.mem master.v spi_slave.v flash_memory.v messages.vh rom.mem + +IVFLAGS = \ + -DMASTER_OPERATIONS_COUNT=$(call FILE_LINES,operations.mem) \ + -DROM_WORDS_COUNT=$(call FILE_LINES,rom.mem) + +TOP = spi_test + +include ../../Makefile.test |