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authorWojciech Kosior <kwojtus@protonmail.com>2020-09-03 20:23:13 +0200
committerWojciech Kosior <kwojtus@protonmail.com>2020-09-03 20:23:13 +0200
commit9d76f0b02695c341a0d734b21b4eb8726bbc06fa (patch)
treeb79764c650d233524cd555b2ef20b561f09f4a2f /tests/embedded_bram_slave/operations.memv
parentefd0269b55e2db03f5c12d6f47b00b0c2a57ff66 (diff)
downloadAGH-engineering-thesis-9d76f0b02695c341a0d734b21b4eb8726bbc06fa.tar.gz
AGH-engineering-thesis-9d76f0b02695c341a0d734b21b4eb8726bbc06fa.zip
treat embedded RAM as read-only in test bench
Diffstat (limited to 'tests/embedded_bram_slave/operations.memv')
-rw-r--r--tests/embedded_bram_slave/operations.memv27
1 files changed, 1 insertions, 26 deletions
diff --git a/tests/embedded_bram_slave/operations.memv b/tests/embedded_bram_slave/operations.memv
index 9cca800..ea3bfc6 100644
--- a/tests/embedded_bram_slave/operations.memv
+++ b/tests/embedded_bram_slave/operations.memv
@@ -1,6 +1,6 @@
`include "macroasm.vh" // look into macroasm.vh for more info
-// First, check if memory initialization went ok
+// Check if memory initialization went ok
`READ (00000, 0000) // 0*7 at address 0
`DESELECT
`READ (00001, 0007) // 1*7 at address 1
@@ -9,28 +9,3 @@
`WAIT
`READ (00089, 03BF) // 137*7 at address 137
`READ (00101, 0707) // 257*7 at address 257
-
-// Now, check that writing works (this is based on self test)
-`WRITE(00000, abcd)
-`WAIT
-`READ (00000, abcd)
-`WRITE(00001, 1234)
-`READ (00000, abcd)
-`DESELECT
-`DESELECT
-`READ (00001, 1234)
-`WRITE(001E0, a2a2)
-`WRITE(00001, 4321)
-`READ (001E0, a2a2)
-`WAIT
-`WAIT
-`WAIT
-`WAIT
-`WAIT
-`DESELECT
-`DESELECT
-`DESELECT
-`WAIT
-`DESELECT
-`WAIT
-`READ(00001, 4321)