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| author | Wojciech Kosior <kwojtus@protonmail.com> | 2020-07-15 20:21:20 +0200 |
|---|---|---|
| committer | Wojciech Kosior <kwojtus@protonmail.com> | 2020-07-15 20:21:20 +0200 |
| commit | 9f366a72a63829f640fd7acf2c6cbea139e9e0ca (patch) | |
| tree | adbbbf4b89ec76f243157a87532a18f294850570 /src/mapping.pcf | |
| parent | 641105c869ddc9bf70454103e7a606bc4377933f (diff) | |
| download | AGH-engineering-thesis-9f366a72a63829f640fd7acf2c6cbea139e9e0ca.tar.gz AGH-engineering-thesis-9f366a72a63829f640fd7acf2c6cbea139e9e0ca.zip | |
add an example of SRAM access
Diffstat (limited to 'src/mapping.pcf')
| -rw-r--r-- | src/mapping.pcf | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/src/mapping.pcf b/src/mapping.pcf new file mode 100644 index 0000000..afdadc4 --- /dev/null +++ b/src/mapping.pcf @@ -0,0 +1,62 @@ +set_io clock_100mhz J3 + +set_io but1 K11 # actually used as reset +set_io but2 P13 + +set_io h_sync J4 +set_io v_sync H2 +set_io vga_red[0] E3 +set_io vga_red[1] H5 +set_io vga_red[2] F3 +set_io vga_green[0] F2 +set_io vga_green[1] H6 +set_io vga_green[2] H3 +set_io vga_blue[0] F1 +set_io vga_blue[1] H4 +set_io vga_blue[2] G2 + +set_io sram_addr[0] N6 +set_io sram_addr[1] T1 +set_io sram_addr[2] P4 +set_io sram_addr[3] R2 +set_io sram_addr[4] N5 +set_io sram_addr[5] T2 +set_io sram_addr[6] P5 +set_io sram_addr[7] R3 +set_io sram_addr[8] R5 +set_io sram_addr[9] T3 +set_io sram_addr[10] R4 +set_io sram_addr[11] M7 +set_io sram_addr[12] N7 +set_io sram_addr[13] P6 +set_io sram_addr[14] M8 +set_io sram_addr[15] T5 +set_io sram_addr[16] R6 +set_io sram_addr[17] P8 + +set_io sram_io[0] T8 +set_io sram_io[1] P7 +set_io sram_io[2] N9 +set_io sram_io[3] T9 +set_io sram_io[4] M9 +set_io sram_io[5] R9 +set_io sram_io[6] K9 +set_io sram_io[7] P9 +set_io sram_io[8] R10 +set_io sram_io[9] L10 +set_io sram_io[10] P10 +set_io sram_io[11] N10 +set_io sram_io[12] T10 +set_io sram_io[13] T11 +set_io sram_io[14] T15 +set_io sram_io[15] T14 + +set_io sram_cs_n T6 +set_io sram_oe_n L9 +set_io sram_we_n T7 + +# SPI to on-board chip +set_io sdo P12 +set_io sdi P11 +set_io sck R11 +set_io ss_n R12 |