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| author | Wojciech Kosior <kwojtus@protonmail.com> | 2020-09-04 17:08:21 +0200 |
|---|---|---|
| committer | Wojciech Kosior <kwojtus@protonmail.com> | 2020-09-04 17:08:21 +0200 |
| commit | 8651fe2b0f78569d4fc1c182833a08d6e463ebe6 (patch) | |
| tree | 9db878a8de136dce6ab07ed2c717352245b4b030 /include | |
| parent | a446751e7d2e962666eea67855aab9a86c63f514 (diff) | |
| download | AGH-engineering-thesis-8651fe2b0f78569d4fc1c182833a08d6e463ebe6.tar.gz AGH-engineering-thesis-8651fe2b0f78569d4fc1c182833a08d6e463ebe6.zip | |
enable parametrizable address and data widths for master model
Diffstat (limited to 'include')
| -rw-r--r-- | include/macroasm.vh | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/include/macroasm.vh b/include/macroasm.vh index 0c63ea7..e6a2893 100644 --- a/include/macroasm.vh +++ b/include/macroasm.vh @@ -22,12 +22,7 @@ operations: 3 - deselect (CYC_O low for one tick) )) -`define READ(addr, expected_data) 0``addr``expected_data -`define WRITE(addr, data) 1``addr``data -`define WAIT 2xxxxxxxxx -`define DESELECT 3xxxxxxxxx - -`C(( -We have to take care to use the correct number of digits for addresses and -datas - the macros don't validate their arguments! -)) +`define READ(addr, expected_data) 0 addr expected_data +`define WRITE(addr, data) 1 addr data +`define WAIT 2 x x +`define DESELECT 3 x x |