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authorWojciech Kosior <kwojtus@protonmail.com>2020-12-29 19:56:04 +0100
committerWojciech Kosior <kwojtus@protonmail.com>2020-12-29 19:56:04 +0100
commit68c80359ba0983bc21a18c0270025be9b441c0bb (patch)
treea06a04eb8756f96d05c55768bd356917847cdc95 /examples/example3a_spi_wasm/data.txt
parent5b6a3f3b216939a11ed1978d7da4dd6bbe4edc2a (diff)
downloadAGH-engineering-thesis-68c80359ba0983bc21a18c0270025be9b441c0bb.tar.gz
AGH-engineering-thesis-68c80359ba0983bc21a18c0270025be9b441c0bb.zip
add the ability to include additional data at the end of bitstream image and prepare an example, that reads thic data through SPI and displays it
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+WebAssembly or Wasm standard developed by W3C Community Group defines a bytecode
+format for executable programs, as well as its text representation. The goal of the bytecode is to
+enable efficient interpretation and keep the size of the binary small. Although it has been created
+mainly for use on web pages, it is suited for other environments as well, including embedded
+targets. Programming languages, even those with manual memory management and pointer
+arithmetics, can be compiled to Wasm bytecode. Hence, a standard-conforming WebAssembly
+interpreter is capable of running code written in any of the languages, for which a compiler
+exists. This currently includes C, C++, C#, Rust and others. Wasm bytecode runs on a virtual
+stack machine. Most existing environments either interpret it directly or use JIT compilation.
+The goal of this thesis is to create a laboratory station for execution of WebAssembly on a
+programmable logic device. The client is a person responsible for the equipment of a laboratory.
+Project’s codename is WMC - WebAssembly Machine in Circuitry.
+
+
+WebAsm interpretation could possibly be made faster with hardware designed specifically for
+this task 1. Such hardware would also benefit from already existing tools for generating and
+working with the bytecode. The entire range of languages, that can be compiled to the bytecode,
+would be immediately available for use on such platform.
+Although a WebAssembly processor would be unique in some sense, it could still be used in a
+fashion similar to other soft processors for programmable logic, enabling sequential execution.
+The processor could be integrated with hardware modules. Such a combination would allow for
+implementing peripheral devices operated by Wasm software. If such WebAssembly processor
+proves speed-efficient, it can be implemented in application-specific integrated circuit.
+
+
+In terms of this thesis a laboratory station for execution of WebAssembly in a programmable
+logic device is going to be created. It will consist of a selected FPGA board with a dedicated
+programmer. Means of communication with the device, for example a VGA display or wired
+connection to a computer, are also going to be ensured.
+Wasm machine is going to be implemented in a hardware description language. Included will
+be: the code, tools to generate bitstream and load it to the board, a test program in WebAssembly binary format, means of transfering it to the device and documentation for the product.
+The client will be a person responsible for equipment of a research laboratory. Aside from
+allowing researchers to evaluate Wasm bytecode execution on the FPGA board, the resulting
+product should allow modification of the logic design, for example to add a peripheral module
+or a custom instruction to the processor and perform experiments with it.
+The designed Wasm machine is going to be a stack machine. Its distinguishable parts will be
+control unit, arithmetic logic unit and peripheral interfaces. An in-circuit stack (as opposed to
+stack fully contained in RAM) and floating-point unit might also be added. The machine shall
+make use of memory module residing on the development board. It shall communicate with
+devices external to FPGA chip through peripherals (e.g. VGA module, serial interface module).