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| author | Wojciech Kosior <kwojtus@protonmail.com> | 2020-09-03 17:41:44 +0200 |
|---|---|---|
| committer | Wojciech Kosior <kwojtus@protonmail.com> | 2020-09-03 17:41:44 +0200 |
| commit | 43f4e586acf76f3ec08d5892ba784ba6ac5d1932 (patch) | |
| tree | 98713aeb990856c6b7a8682236d50ec3c4d5f01f /Makefile | |
| parent | 3c7da9cdf1e69a6a0a64cb99ddbf2d0695000391 (diff) | |
| download | AGH-engineering-thesis-43f4e586acf76f3ec08d5892ba784ba6ac5d1932.tar.gz AGH-engineering-thesis-43f4e586acf76f3ec08d5892ba784ba6ac5d1932.zip | |
add the ability to synthesize the design
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 40 |
1 files changed, 36 insertions, 4 deletions
@@ -3,6 +3,15 @@ CFLAGS = -std=c89 -pedantic -Wall -Werror -O2 IV = iverilog +YOSYS = git-yosys +PNR = git-nextpnr-ice40 +ICEPACK = git-icepack +ICETIME = git-icetime + +TOPMODULE = soc + +PCF = design/pins.pcf + IVFLAGS = -Iinclude/ -DSIMULATION # The macroassembly header file is somewhat different thing, but I don't know # what place would be more suitable for it than include/ dir @@ -57,7 +66,7 @@ TEST_LOGS := $(foreach TEST,$(TESTS),tests/$(TEST)/report.log) TOOLS_TARGETS := $(addprefix tools/,$(TOOLS)) -GENERATED_MEM_FILES := $(shell find tests/ -name "*.s.tcl") +GENERATED_MEM_FILES := $(shell find . -name "*.s.tcl") GENERATED_MEM_FILES := $(basename $(basename $(GENERATED_MEM_FILES))) GENERATED_MEM_FILES += $(basename $(shell find tests/ -name "*.memv")) GENERATED_MEM_FILES := $(addsuffix .mem,$(GENERATED_MEM_FILES)) @@ -65,12 +74,35 @@ GENERATED_MEM_FILES := $(addsuffix .mem,$(GENERATED_MEM_FILES)) # TODO: check if this function can be changed to use $(shell grep ...) FILE_LINES = `grep -E '^[[:space:]]*[^[:space:]/]' -c $(1)` +all : design.bin + + +design.v : design/rom.mem design/*.v + $(IV) -E $(filter %.v,$^) -DROM_WORDS_COUNT=$(call FILE_LINES,$<) -o $@ + +design.json : design.v design/rom.mem design/font.mem + $(YOSYS) -p 'read_verilog -defer $<' \ + -p 'synth_ice40 -top $(TOPMODULE) -json $@' + +design.asc : design.json $(PCF) + $(PNR) --hx8k --asc $@ --pcf $(PCF) --json $< --package ct256 + +design.bin : design.asc + $(ICEPACK) $< $@ + +timing.rpt : design.asc + $(ICETIME) -d hx8k -mtr $@ $< + +prog : design.bin + sudo iceprogduino $< + + test : $(TEST_TARGETS) tests/%.mem : tests/%.memv $(IV) $(MACROASM_FLAGS) $^ -o $@ -tests/%.mem : tests/%.s.tcl tclasm.tcl +%.mem : %.s.tcl tclasm.tcl $< > $@ tests/self/test.vvp : tests/self/operations.mem tests/self/test.v \ @@ -152,7 +184,7 @@ clean : -find tests/ -name "VGAdump.mem" -delete -find tests/ -name "VGAdump.ppm" -delete -rm $(GENERATED_MEM_FILES) - -rm tests + -rm design.json design.v design.asc design.bin timing.rpt -rm $(TOOLS_TARGETS) -.PHONY : tools test $(TEST_TARGETS) +.PHONY : all tools test $(TEST_TARGETS) |