`include "macroasm.vh" // look into macroasm.vh for more info

// power up flash ship
`WRITE (00100, 0001) // set bytes_to_output to 1
`WRITE (00101, 0000) // set bytes_to_receive to 0

`WRITE (00000, 00AB) // release power-down spi command

`WRITE (00102, 1111) // start spi operation


// reading this reg during operation should yield 1's
`READ  (00102, FFFF)


// the completions of first write after spi operation has been started
// will be delayed until the operations has finished. This is of no concern
// here, since the master will just gently wait for ACK from slave.


// read contents at addresses h3A through h4A
`WRITE (00101, 0010) // set bytes_to_receive to 16 (h10)
`READ  (00102, 0000) // see, that operation indeed finished

`WRITE (00000, 000B) // fast read spi command + 8 high address bits
`WRITE (00001, 3A00) // 16 low address bits
`WRITE (00002, 0000) // dummy byte

`WRITE (00100, 0005) // set bytes_to_output to 5

// Cause delay b4 starting operation - chip's power-up takes 3000ns
`DESELECT
`DESELECT
`WAIT
`DESELECT
`WAIT
`DESELECT

`WRITE (00102, 1111) // start spi operation (bits written to h102 don't matter)

`WRITE (00100, 0000) // force wait for operation completion

// check the data we've just read
`READ  (00000, 00CB)
`READ  (00001, 00D2)
`READ  (00002, 00D9)
`READ  (00003, 00E0)
`READ  (00004, 00E7)
`READ  (00005, 00EE)
`READ  (00006, 00F5)
`READ  (00007, 00FC)

// how about reading a single byte?
`WRITE (00100, 0005) // set bytes_to_output to 5
`WRITE (00101, 0001) // set bytes_to_receive to 1
`WRITE (00000, 000B) // fast read spi command + 8 high address bits
`WRITE (00001, E400) // 16 low address bits
//`WRITE (00002, 0000) // dummy byte
`WRITE (00102, BEEF) // start spi operation
`WRITE (00100, 0000) // force wait for operation completion

`READ  (00000, xx1E) // check the byte we've just read