blob: a8df084ad15534e66c1fdb9f973a24c8d8c3ac9c (
about) (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
|
#include "uart.h"
#include "cpsr.h"
void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags)
{
// Declare as unused
(void) r0;
(void) r1;
(void) atags;
uart_init();
// When we attach screen session after loading kernel with socat
// we miss kernel's greeting... So we'll make the kernel wait for
// one char we're going to send from within screen
uart_getc();
uart_puts("Hello, kernel World!\r\n");
uint32_t ID_MMFR0;
// get contents of coprocessor register to check for paging support
asm("mrc p15, 0, %0, c0, c1, 4" : "=r" (ID_MMFR0));
char *paging;
switch(ID_MMFR0 & 0xf) /* lowest 4 bits indicate VMSA support */
{
case 0 : paging = "no paging\n\r"; break;
case 1 : paging = "implementation defined paging\n\r"; break;
case 2 : paging = "VMSAv6, with cache and TLB type registers\n\r"; break;
case 3 : paging = "VMSAv7, with support for remapping and access flag\n\r"; break;
case 4 : paging = "VMSAv7 with PXN bit supported\n\r"; break;
case 5 : paging = "VMSAv7, PXN and long format descriptors. EPAE is supported.\n\r"; break;
default : paging = "?_? unknown paging ?_?\n\r";
}
uart_puts(paging);
uint32_t CPSR;
// get content of current program status register to check the current
// processor mode
asm("mrs %0, cpsr" : "=r" (CPSR) :: "memory");
char *mode;
switch(read_processor_mode())
{
case 0x10 : mode = "User (PL0)\r\n"; break;
case 0x11 : mode = "FIQ (PL1)\r\n"; break;
case 0x12 : mode = "IRQ (PL1)\r\n"; break;
case 0x13 : mode = "Supervisor (PL1)\r\n"; break;
case 0x16 : mode = "Monitor (PL1)\r\n"; break;
case 0x17 : mode = "Abort (PL1)\r\n"; break;
case 0x1a : mode = "Hyp (PL2)\r\n"; break;
case 0x1b : mode = "Undefined (PL1)\r\n"; break;
case 0x1f : mode = "System (PL1)\r\n"; break;
default : mode = "Unknown mode\r\n"; break;
}
uart_puts(mode);
set_system_mode();
switch(read_processor_mode())
{
case 0x10 : mode = "User (PL0)\r\n"; break;
case 0x11 : mode = "FIQ (PL1)\r\n"; break;
case 0x12 : mode = "IRQ (PL1)\r\n"; break;
case 0x13 : mode = "Supervisor (PL1)\r\n"; break;
case 0x16 : mode = "Monitor (PL1)\r\n"; break;
case 0x17 : mode = "Abort (PL1)\r\n"; break;
case 0x1a : mode = "Hyp (PL2)\r\n"; break;
case 0x1b : mode = "Undefined (PL1)\r\n"; break;
case 0x1f : mode = "System (PL1)\r\n"; break;
default : mode = "Unknown mode\r\n"; break;
}
uart_puts(mode);
while (1)
uart_putc(uart_getc());
}
|