diff options
Diffstat (limited to 'uart.h')
| -rw-r--r-- | uart.h | 99 |
1 files changed, 79 insertions, 20 deletions
@@ -1,7 +1,6 @@ #ifndef UART_H #define UART_H -#include <stddef.h> #include <stdint.h> #include <global.h> @@ -14,30 +13,90 @@ #define GPPUDCLK0 (GPIO_BASE + 0x98) // The base address for UART. -#define UART0_BASE (GPIO_BASE + 0x1000) +#define PL011_UART_BASE (GPIO_BASE + 0x1000) // The offsets for reach register for the UART. -#define UART0_DR (UART0_BASE + 0x00) -#define UART0_RSRECR (UART0_BASE + 0x04) -#define UART0_FR (UART0_BASE + 0x18) -#define UART0_ILPR (UART0_BASE + 0x20) -#define UART0_IBRD (UART0_BASE + 0x24) -#define UART0_FBRD (UART0_BASE + 0x28) -#define UART0_LCRH (UART0_BASE + 0x2C) -#define UART0_CR (UART0_BASE + 0x30) -#define UART0_IFLS (UART0_BASE + 0x34) -#define UART0_IMSC (UART0_BASE + 0x38) -#define UART0_RIS (UART0_BASE + 0x3C) -#define UART0_MIS (UART0_BASE + 0x40) -#define UART0_ICR (UART0_BASE + 0x44) -#define UART0_DMACR (UART0_BASE + 0x48) -#define UART0_ITCR (UART0_BASE + 0x80) -#define UART0_ITIP (UART0_BASE + 0x84) -#define UART0_ITOP (UART0_BASE + 0x88) -#define UART0_TDR (UART0_BASE + 0x8C) +#define PL011_UART_DR (PL011_UART_BASE + 0x00) +#define PL011_UART_RSRECR (PL011_UART_BASE + 0x04) +#define PL011_UART_FR (PL011_UART_BASE + 0x18) +#define PL011_UART_ILPR (PL011_UART_BASE + 0x20) +#define PL011_UART_IBRD (PL011_UART_BASE + 0x24) +#define PL011_UART_FBRD (PL011_UART_BASE + 0x28) +#define PL011_UART_LCRH (PL011_UART_BASE + 0x2C) +#define PL011_UART_CR (PL011_UART_BASE + 0x30) +#define PL011_UART_IFLS (PL011_UART_BASE + 0x34) +#define PL011_UART_IMSC (PL011_UART_BASE + 0x38) +#define PL011_UART_RIS (PL011_UART_BASE + 0x3C) +#define PL011_UART_MIS (PL011_UART_BASE + 0x40) +#define PL011_UART_ICR (PL011_UART_BASE + 0x44) +#define PL011_UART_DMACR (PL011_UART_BASE + 0x48) +#define PL011_UART_ITCR (PL011_UART_BASE + 0x80) +#define PL011_UART_ITIP (PL011_UART_BASE + 0x84) +#define PL011_UART_ITOP (PL011_UART_BASE + 0x88) +#define PL011_UART_TDR (PL011_UART_BASE + 0x8C) void uart_init(); void putchar(char c); char getchar(void); +_Bool putchar_non_blocking(char c); +int getchar_non_blocking(void); + +static inline _Bool uart_irq_pending(void) +{ + return + ((uint32_t) 1 << 25) & *(uint32_t volatile*) ARM_IRQ_PENDING_2; +} + +static inline void uart_irq_disable(void) +{ + // Mask uart in arm peripheral interrupts + *(uint32_t volatile*) ARM_DISABLE_IRQS_2 = ((uint32_t) 1 << 25); +} + +static inline void uart_irq_enable(void) +{ + // Unmask uart in arm peripheral interrupts + *(uint32_t volatile*) ARM_ENABLE_IRQS_2 = ((uint32_t) 1 << 25); +} + +static inline _Bool uart_recv_irq_pending(void) +{ + return ((uint32_t) 1 << 4) & *(uint32_t volatile*) PL011_UART_RIS; +} + +static inline void uart_recv_irq_disable(void) +{ + *(uint32_t volatile*) PL011_UART_IMSC &= ~(1 << 4); +} + +static inline void uart_recv_irq_enable(void) +{ + *(uint32_t volatile*) PL011_UART_IMSC |= (1 << 4); +} + +static inline void uart_clear_recv_irq(void) +{ + *(uint32_t volatile*) PL011_UART_ICR = (1 << 4); +} + +static inline _Bool uart_send_irq_pending(void) +{ + return ((uint32_t) 1 << 5) & *(uint32_t volatile*) PL011_UART_RIS; +} + +static inline void uart_send_irq_disable(void) +{ + *(uint32_t volatile*) PL011_UART_IMSC &= ~(1 << 5); +} + +static inline void uart_send_irq_enable(void) +{ + *(uint32_t volatile*) PL011_UART_IMSC |= (1 << 5); +} + +static inline void uart_clear_send_irq(void) +{ + *(uint32_t volatile*) PL011_UART_ICR = (1 << 5); +} #endif // UART_H |