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-rw-r--r--src/global.h53
1 files changed, 53 insertions, 0 deletions
diff --git a/src/global.h b/src/global.h
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+++ b/src/global.h
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+#ifndef GLOBAL_H
+#define GLOBAL_H
+
+#include <stdint.h>
+
+// board type, raspi2
+#define RASPI 2
+
+// conditionally #define PERIF_BASE
+#if RASPI == 4
+
+#define PERIF_BASE 0xFE000000
+
+#elif RASPI == 3 || RASPI == 2
+
+#define PERIF_BASE 0x3F000000
+
+#else // if RASPI == 1
+
+#define PERIF_BASE 0x20000000
+
+#endif
+
+// GPIO_BASE is #define'd in terms of PERIF_BASE
+// (as in sane kernels - like linux, not like in wiki.osdev codes...)
+#define GPIO_BASE (PERIF_BASE + 0x200000)
+
+// ARM control block
+// called "base address for the ARM interrupt register" elsewhere
+#define ARM_BASE (PERIF_BASE + 0xB000)
+
+#define ARM_IRQ_BASIC_PENDING (ARM_BASE + 0x200)
+#define ARM_IRQ_PENDING_1 (ARM_BASE + 0x204)
+#define ARM_IRQ_PENDING_2 (ARM_BASE + 0x208)
+#define ARM_FIQ_CONTROL (ARM_BASE + 0x20C)
+#define ARM_ENABLE_IRQS_1 (ARM_BASE + 0x210)
+#define ARM_ENABLE_IRQS_2 (ARM_BASE + 0x214)
+#define ARM_ENABLE_BASIC_IRQS (ARM_BASE + 0x218)
+#define ARM_DISABLE_IRQS_1 (ARM_BASE + 0x21C)
+#define ARM_DISABLE_IRQS_2 (ARM_BASE + 0x220)
+#define ARM_DISABLE_BASIC_IRQS (ARM_BASE + 0x224)
+
+inline static uint32_t rd32(uint32_t addr)
+{
+ return *(uint32_t volatile*) addr;
+}
+
+inline static void wr32(uint32_t addr, uint32_t value)
+{
+ *(uint32_t volatile*) addr = value;
+}
+
+#endif // GLOBAL_H