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authorWojtek Kosior <kwojtus@protonmail.com>2019-12-31 20:11:37 +0100
committerWojtek Kosior <kwojtus@protonmail.com>2019-12-31 20:11:37 +0100
commit0d36a8bac1240eefdabe5ab96b9332cf73383d9d (patch)
treecf8c626ed402aa0f53c41b18f8c1e30d11b1584d /uart.h
parentb1327588146761d10c949d365f3150f9a7504ee4 (diff)
downloadrpi-MMU-example-0d36a8bac1240eefdabe5ab96b9332cf73383d9d.tar.gz
rpi-MMU-example-0d36a8bac1240eefdabe5ab96b9332cf73383d9d.zip
use nice #define's instead of ugly enum
Diffstat (limited to 'uart.h')
-rw-r--r--uart.h56
1 files changed, 27 insertions, 29 deletions
diff --git a/uart.h b/uart.h
index d5e931b..f2fd6af 100644
--- a/uart.h
+++ b/uart.h
@@ -4,39 +4,37 @@
#include <stddef.h>
#include <stdint.h>
#include <global.h>
-enum
- {
- // The offsets for reach register.
- // Controls actuation of pull up/down to ALL GPIO pins.
- GPPUD = (GPIO_BASE + 0x94),
+// The offsets for reach register.
- // Controls actuation of pull up/down for specific GPIO pin.
- GPPUDCLK0 = (GPIO_BASE + 0x98),
+// Controls actuation of pull up/down to ALL GPIO pins.
+#define GPPUD (GPIO_BASE + 0x94)
- // The base address for UART.
- UART0_BASE = 0x3F201000, // for raspi2 & 3, 0x20201000 for raspi1
+// Controls actuation of pull up/down for specific GPIO pin.
+#define GPPUDCLK0 (GPIO_BASE + 0x98)
- // The offsets for reach register for the UART.
- UART0_DR = (UART0_BASE + 0x00),
- UART0_RSRECR = (UART0_BASE + 0x04),
- UART0_FR = (UART0_BASE + 0x18),
- UART0_ILPR = (UART0_BASE + 0x20),
- UART0_IBRD = (UART0_BASE + 0x24),
- UART0_FBRD = (UART0_BASE + 0x28),
- UART0_LCRH = (UART0_BASE + 0x2C),
- UART0_CR = (UART0_BASE + 0x30),
- UART0_IFLS = (UART0_BASE + 0x34),
- UART0_IMSC = (UART0_BASE + 0x38),
- UART0_RIS = (UART0_BASE + 0x3C),
- UART0_MIS = (UART0_BASE + 0x40),
- UART0_ICR = (UART0_BASE + 0x44),
- UART0_DMACR = (UART0_BASE + 0x48),
- UART0_ITCR = (UART0_BASE + 0x80),
- UART0_ITIP = (UART0_BASE + 0x84),
- UART0_ITOP = (UART0_BASE + 0x88),
- UART0_TDR = (UART0_BASE + 0x8C),
- };
+// The base address for UART.
+#define UART0_BASE (GPIO_BASE + 0x1000)
+
+// The offsets for reach register for the UART.
+#define UART0_DR (UART0_BASE + 0x00)
+#define UART0_RSRECR (UART0_BASE + 0x04)
+#define UART0_FR (UART0_BASE + 0x18)
+#define UART0_ILPR (UART0_BASE + 0x20)
+#define UART0_IBRD (UART0_BASE + 0x24)
+#define UART0_FBRD (UART0_BASE + 0x28)
+#define UART0_LCRH (UART0_BASE + 0x2C)
+#define UART0_CR (UART0_BASE + 0x30)
+#define UART0_IFLS (UART0_BASE + 0x34)
+#define UART0_IMSC (UART0_BASE + 0x38)
+#define UART0_RIS (UART0_BASE + 0x3C)
+#define UART0_MIS (UART0_BASE + 0x40)
+#define UART0_ICR (UART0_BASE + 0x44)
+#define UART0_DMACR (UART0_BASE + 0x48)
+#define UART0_ITCR (UART0_BASE + 0x80)
+#define UART0_ITIP (UART0_BASE + 0x84)
+#define UART0_ITOP (UART0_BASE + 0x88)
+#define UART0_TDR (UART0_BASE + 0x8C)
void uart_init();
void putchar(char c);