aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorvetch <vetch97@gmail.com>2020-01-14 06:03:14 +0100
committervetch <vetch97@gmail.com>2020-01-14 06:03:14 +0100
commita7a865e869d11962256ad10b155bf73e78f27c64 (patch)
treee052ea3840c6b6d664b993f422a1d7387087d24b /src
parent6e24b3246019e7ddca16771b8999f8041bbfde96 (diff)
downloadrpi-MMU-example-a7a865e869d11962256ad10b155bf73e78f27c64.tar.gz
rpi-MMU-example-a7a865e869d11962256ad10b155bf73e78f27c64.zip
small improvements in interrupts
Diffstat (limited to 'src')
-rw-r--r--src/arm/PL1/kernel/interrupts.c8
-rw-r--r--src/arm/PL1/kernel/interrupts.h2
2 files changed, 2 insertions, 8 deletions
diff --git a/src/arm/PL1/kernel/interrupts.c b/src/arm/PL1/kernel/interrupts.c
index 121d79c..2c3c752 100644
--- a/src/arm/PL1/kernel/interrupts.c
+++ b/src/arm/PL1/kernel/interrupts.c
@@ -3,10 +3,6 @@
#include "svc_interface.h"
#include "armclock.h"
#include "scheduler.h"
-/**
- @brief The undefined instruction interrupt handler
-**/
-
void __attribute__((noreturn)) setup(void);
@@ -107,19 +103,17 @@ void fiq_handler(void)
}
-/* Here is your interrupt function */
+/* Old, not sure if working interrupt function */
//void
//__attribute__((interrupt("IRQ")))
//__attribute__((section(".interrupt_vectors.text")))
//irq_handler2(void) {
-// /* You code goes here */
//// uart_puts("GOT INTERRUPT!\r\n");
//
// local_timer_clr_reload_reg_t temp = { .IntClear = 1, .Reload = 1 };
// QA7->TimerClearReload = temp; // Clear interrupt & reload
//}
-///* here is your main */
//int enable_timer(void) {
//
// QA7->TimerRouting.Routing = LOCALTIMER_TO_CORE0_IRQ; // Route local timer IRQ to Core0
diff --git a/src/arm/PL1/kernel/interrupts.h b/src/arm/PL1/kernel/interrupts.h
index c2818ee..6d820fa 100644
--- a/src/arm/PL1/kernel/interrupts.h
+++ b/src/arm/PL1/kernel/interrupts.h
@@ -29,7 +29,7 @@
#define RPI_BASIC_ACCESS_ERROR_1_IRQ (1 << 6)
#define RPI_BASIC_ACCESS_ERROR_0_IRQ (1 << 7)
-// @brief The interrupt controller memory mapped register set
+// The interrupt controller memory mapped register set
typedef struct {
volatile uint32_t IRQ_basic_pending;
volatile uint32_t IRQ_pending_1;