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authorvetch <vetch97@gmail.com>2020-01-04 19:37:32 +0100
committervetch <vetch97@gmail.com>2020-01-04 19:37:32 +0100
commit615e3302c9dd358bb64cd56d1f3814ad8d5df84d (patch)
tree07b0469807eb3bff7ff7d3f3576858642bc66675 /src/clock/bcmclock.h
parent885a097da42317f48cead2d91c0e0240066943a8 (diff)
downloadrpi-MMU-example-615e3302c9dd358bb64cd56d1f3814ad8d5df84d.tar.gz
rpi-MMU-example-615e3302c9dd358bb64cd56d1f3814ad8d5df84d.zip
rearranged files, updated makefile
Diffstat (limited to 'src/clock/bcmclock.h')
-rw-r--r--src/clock/bcmclock.h35
1 files changed, 35 insertions, 0 deletions
diff --git a/src/clock/bcmclock.h b/src/clock/bcmclock.h
new file mode 100644
index 0000000..7070283
--- /dev/null
+++ b/src/clock/bcmclock.h
@@ -0,0 +1,35 @@
+#ifndef BCMCLOCK_H
+#define BCMCLOCK_H
+
+#include <stdint.h>
+
+#include "global.h"
+
+#define ST_BASE (PERIF_BASE + 0x3000) // System Timer
+
+#define ST_CS (ST_BASE + 0x0) // System Timer Control/Status
+#define ST_CLO (ST_BASE + 0x4) // System Timer Counter Lower 32 bits
+#define ST_CHI (ST_BASE + 0x8) // System Timer Counter Higher 32 bits
+#define ST_C0 (ST_BASE + 0xC) // System Timer Compare 0
+#define ST_C1 (ST_BASE + 0x10) // System Timer Compare 1
+#define ST_C2 (ST_BASE + 0x14) // System Timer Compare 2
+#define ST_C3 (ST_BASE + 0x18) // System Timer Compare 3
+
+static inline void bcmclk_enable_timer_irq(void)
+{
+ wr32(ARM_ENABLE_IRQS_1, 1 << 3);
+}
+
+static inline void bcmclk_disable_timer_irq(void)
+{
+ wr32(ARM_DISABLE_IRQS_1, 1 << 3);
+}
+
+static inline void bcmclk_irq_settimeout(uint32_t timeout)
+{
+ uint32_t clock_now = rd32(ST_CLO);
+ wr32(ST_C3, clock_now + timeout);
+ wr32(ST_CS, 1 << 3);
+}
+
+#endif // BCMCLOCK_H