Merge branch 'bob' of https://repo.or.cz/RPi-MMU-example into alice

# Conflicts:
#	src/arm/PL1/kernel/interrupts.c

1 files changed, 12 insertions, 3 deletions

diff --git a/src/arm/PL1/kernel/paging.c b/src/arm/PL1/kernel/paging.c
index 771c681..6da9905 100644
--- a/src/arm/PL1/kernel/paging.c
+++ b/src/arm/PL1/kernel/paging.c
@@ -101,10 +101,11 @@ void setup_flat_map(void)
   // enable MMU
   puts("enabling the MMU");
 
-  // redundant - we already have SCTLR contents in the variable
-  // asm("mrc p15, 0, %0, c1, c0, 0" : "=r" (SCTLR.raw));
+  // we already have SCTLR contents in the variable
 
-  SCTLR.fields.M = 1;
+  SCTLR.fields.M = 1; // enable MMU
+  SCTLR.fields.C = 1; // enable data cache
+  SCTLR.fields.I = 1; // enable instruction cache
 
   asm("mcr p15, 0, %0, c1, c0, 0\n\r"
       "isb" :: "r" (SCTLR.raw) : "memory");
@@ -241,6 +242,14 @@ uint16_t claim_and_map_section
   // write modified descriptor to the table
   *section_entry = descriptor;
   
+  // invalidate instruction cache
+  asm("mcr p15, 0, r0, c7, c5, 0\n\r" // r0 gets ignored
+      "isb" ::: "memory");
+
+  // invalidate branch-prediction
+  asm("mcr p15, 0, r0, c7, c5, 6\n\r" // r0 - same as above
+      "isb" ::: "memory");
+
   // invalidate main Translation Lookup Buffer
   asm("mcr p15, 0, r1, c8, c7, 0\n\r"
       "isb" ::: "memory");