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author | Wojtek Kosior <kwojtus@protonmail.com> | 2020-01-02 13:47:05 +0100 |
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committer | Wojtek Kosior <kwojtus@protonmail.com> | 2020-01-02 13:47:05 +0100 |
commit | 6bf5a3b8c6e8a5d1cb3fb4880a5d9688ab094c62 (patch) | |
tree | 021d4e99f68fefa124f77ed977b729a9701a2fee /bcmclock.h | |
parent | 03e9c87115527eeb21d5c7c554c3a1b6f8211e54 (diff) | |
download | rpi-MMU-example-6bf5a3b8c6e8a5d1cb3fb4880a5d9688ab094c62.tar.gz rpi-MMU-example-6bf5a3b8c6e8a5d1cb3fb4880a5d9688ab094c62.zip |
use clock3; don't write to registers of arm timer (former mistake)
Diffstat (limited to 'bcmclock.h')
-rw-r--r-- | bcmclock.h | 10 |
1 files changed, 4 insertions, 6 deletions
@@ -17,21 +17,19 @@ static inline void bcmclk_enable_timer_irq(void) { - *(uint32_t volatile*) ARM_ENABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) ARM_ENABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) ARM_ENABLE_IRQS_1 = 1 << 3; } static inline void bcmclk_disable_timer_irq(void) { - *(uint32_t volatile*) ARM_DISABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) ARM_DISABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) ARM_DISABLE_IRQS_1 = 1 << 3; } static inline void bcmclk_irq_settimeout(uint32_t timeout) { uint32_t clock_now = *(uint32_t volatile*) ST_CLO; - *(uint32_t volatile*) ST_C2 = clock_now + timeout; - *(uint32_t volatile*) ST_CS = 1 << 2; + *(uint32_t volatile*) ST_C3 = clock_now + timeout; + *(uint32_t volatile*) ST_CS = 1 << 3; } #endif // BCMCLOCK_H |