diff options
author | Liliana Marie Prikler <liliana.prikler@gmail.com> | 2023-08-01 22:21:09 +0200 |
---|---|---|
committer | Liliana Marie Prikler <liliana.prikler@gmail.com> | 2023-08-01 22:21:09 +0200 |
commit | 8de4131b2ddd11faa3394cf497484563068c9e7a (patch) | |
tree | ed4ed9e586c7236f09c109afdd416dac18ba8cc3 /gnu/packages/patches/zig-0.9-riscv-support.patch | |
parent | 15406013fe63f2ab238eec2d7a8adbc586806ac8 (diff) | |
parent | 45b7a8bfda5bde2e2daee4bec0ca092cd719d726 (diff) | |
download | guix-8de4131b2ddd11faa3394cf497484563068c9e7a.tar.gz guix-8de4131b2ddd11faa3394cf497484563068c9e7a.zip |
Merge branch 'master' into emacs-team
Diffstat (limited to 'gnu/packages/patches/zig-0.9-riscv-support.patch')
-rw-r--r-- | gnu/packages/patches/zig-0.9-riscv-support.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/gnu/packages/patches/zig-0.9-riscv-support.patch b/gnu/packages/patches/zig-0.9-riscv-support.patch new file mode 100644 index 0000000000..372a68ea02 --- /dev/null +++ b/gnu/packages/patches/zig-0.9-riscv-support.patch @@ -0,0 +1,47 @@ +https://github.com/ziglang/zig/commit/ca3c4ff2d0afcdc8fe86e7e7b41a967c88779729 +From: Shupei Fan <dymarkfan@outlook.com> +zig0: properly set llvm_cpu_names and llvm_cpu_features for riscv + +Bug: https://bugs.gentoo.org/851732 + +--- a/src/stage1/zig0.cpp ++++ b/src/stage1/zig0.cpp +@@ -160,6 +160,17 @@ static void get_native_target(ZigTarget *target) { + } + } + ++static const char* get_baseline_llvm_cpu_name(ZigLLVM_ArchType arch) { ++ return ""; ++} ++ ++static const char* get_baseline_llvm_cpu_features(ZigLLVM_ArchType arch) { ++ switch (arch) { ++ case ZigLLVM_riscv64: return "+a,+c,+d,+m"; ++ default: return ""; ++ } ++} ++ + static Error target_parse_triple(struct ZigTarget *target, const char *zig_triple, const char *mcpu, + const char *dynamic_linker) + { +@@ -178,8 +189,8 @@ static Error target_parse_triple(struct ZigTarget *target, const char *zig_tripl + } else if (strcmp(mcpu, "baseline") == 0) { + target->is_native_os = false; + target->is_native_cpu = false; +- target->llvm_cpu_name = ""; +- target->llvm_cpu_features = ""; ++ target->llvm_cpu_name = get_baseline_llvm_cpu_name(target->arch); ++ target->llvm_cpu_features = get_baseline_llvm_cpu_features(target->arch); + } else { + const char *msg = "stage0 can't handle CPU/features in the target"; + stage2_panic(msg, strlen(msg)); +@@ -220,6 +231,9 @@ static Error target_parse_triple(struct ZigTarget *target, const char *zig_tripl + const char *msg = "stage0 can't handle CPU/features in the target"; + stage2_panic(msg, strlen(msg)); + } ++ ++ target->llvm_cpu_name = get_baseline_llvm_cpu_name(target->arch); ++ target->llvm_cpu_features = get_baseline_llvm_cpu_features(target->arch); + } + + return ErrorNone; |