gnu: python-asyncssh: Update to 2.13.1. - guix

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author	Lars-Dominik Braun <ldb@leibniz-psychology.org>	2023-04-25 14:25:49 +0200
committer	Lars-Dominik Braun <ldb@leibniz-psychology.org>	2023-04-25 14:27:14 +0200
commit	472706ae2f9160833951a4e4bcc4c206e03097b0 (patch)
tree	8bba9829fbef3ef3227b65985bdeb07858faf97f /ROADMAP
parent	0daa747de24a9739b32a13e0c55ae2bfe4666bf1 (diff)
download	guix-472706ae2f9160833951a4e4bcc4c206e03097b0.tar.gz guix-472706ae2f9160833951a4e4bcc4c206e03097b0.zip

gnu: python-asyncssh: Update to 2.13.1.

Includes fix for python-cryptography>=39 disallowing SHA-1 signatures, which caused the testsuite to fail. * gnu/packages/ssh.scm (python-asyncssh): Update to 2.13.1.

Diffstat (limited to 'ROADMAP')

0 files changed, 0 insertions, 0 deletions

rogram can be made to work as if it was running from some memory address, while it in fact runs from a different one!

+The addresses used by program code are referred to as virtual addresses, while addresses actually used by the processor - as physical addresses.

+This aids operating system's memory management in several ways

+1. A program may by compiled to run from some fixed address and the OS is still free to choose any physical location to store that program's code - only a translation of program's required address to that location's address has to be configured. A problem of simultaneous execution of multiple programs compiled for the same address is also avoided in this way.

+2. A consecutive memory region might be required by some program. In a scenerio where due to earlier allocations and deallocactions no big enough (no pun intended) consecutive region of physical memory is free, smaller regions can be mapped to become accessible as a single region in virtual address space, thus avoiding the need for defragmentation.

+A given mapping can be made valid for only one execution mode (i.e. region only accessible from privileged mode) or only certain types of accesses (i.e. a memory region can be made non-executable, which guards against accidental jumping there by program code (important for countering buffer-overflow exploits)). An unallowed access triggers a processor exception, which passes control to an appropriate interrupt service routine.

+General configuration of the MMU in ARM processors it is present on is done through registers of the appropriate coprocessor (cp15). Translations are managed through translation table. It is an array of 32-bit or 64-bit entries describing how their corresponding memory regions should be mapped. A number of leftmost bits of a virtual address constitutes an index into the translation table to be used for translating it. This way no virtual addresses need to be stored in the table and MMU can perform translations in O(1) time.


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