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-rw-r--r--tests/interface_wrapper/operations.memv51
1 files changed, 51 insertions, 0 deletions
diff --git a/tests/interface_wrapper/operations.memv b/tests/interface_wrapper/operations.memv
new file mode 100644
index 0000000..2b581b5
--- /dev/null
+++ b/tests/interface_wrapper/operations.memv
@@ -0,0 +1,51 @@
+`include "macroasm.vh" // look into macroasm.vh for more info
+
+// First - a sequence of reads and writes like in self_32bit_word test
+`WRITE(000000, deadbeef)
+`WAIT
+`READ (000000, deadbeef)
+`WRITE(180004, 1234abcd)
+`READ (000000, deadbeef)
+`DESELECT
+`DESELECT
+`READ (180004, 1234abcd)
+`WRITE(101010, a2a24444)
+`WRITE(180004, 7c7c7c7c)
+`READ (101010, a2a24444)
+`WRITE(100004, 9901fe23)
+`WAIT
+`WAIT
+`WAIT
+`WAIT
+`WAIT
+`DESELECT
+`DESELECT
+`DESELECT
+`WAIT
+`READ(100004, 9901fe23)
+`DESELECT
+`WAIT
+`READ(180004, 7c7c7c7c)
+
+// Now, a sequence with some word-aligned but not dword-aligned reads and writes
+`WRITE(180006, bebebaba)
+`READ (180004, baba7c7c)
+`WAIT
+`WRITE(18000a, 90907878)
+`DESELECT
+`WRITE(10100e, a1a1a0a0)
+`READ (180008, 7878bebe)
+`READ (101010, a2a2a1a1)
+`WAIT
+`DESELECT
+`WAIT
+`WRITE(004402, 2c0ffee5)
+`READ (004402, 2c0ffee5)
+`WRITE(004404, 00003c0f)
+`WAIT
+`WAIT
+`WAIT
+`READ (004402, 3c0ffee5)
+`WRITE(012302, 0fca0000)
+`WRITE(012306, 0000baca)
+`READ (012304, baca0fca)