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-rw-r--r--Makefile64
1 files changed, 33 insertions, 31 deletions
diff --git a/Makefile b/Makefile
index 39f1f1b..cad5c5f 100644
--- a/Makefile
+++ b/Makefile
@@ -1,40 +1,34 @@
-PROJ_DIR := .
+PROJ_DIR := ./
+
+def : design.bin
-include Makefile.config
include Makefile.util
-include tools/Makefile.tools
-TEST_TARGETS := $(addprefix test_,$(shell ls tests))
+IVFLAGS += -Iinclude/
-TOOLS_TARGETS := $(addprefix tools/,$(TOOLS))
+TESTS := $(notdir \
+ $(shell find $(PROJ_DIR)/tests -maxdepth 1 -mindepth 1 -type d))
-GENERATED_MEM_FILES := $(shell find design/ -name "*.s.tcl")
-GENERATED_MEM_FILES := $(basename $(basename $(GENERATED_MEM_FILES)))
-GENERATED_MEM_FILES := $(addsuffix .mem,$(GENERATED_MEM_FILES))
+TEST_TARGETS := $(addprefix test_,$(TESTS))
-all : design.bin
+EXAMPLES := $(notdir \
+ $(shell find $(PROJ_DIR)/examples -maxdepth 1 -mindepth 1 -type d))
+EXAMPLE_SIM_TARGETS := $(addprefix simulate_,$(EXAMPLES))
+EXAMPLE_BUILD_TARGETS := $(addprefix build_,$(EXAMPLES))
+EXAMPLE_PROG_TARGETS := $(addprefix prog_,$(EXAMPLES))
-design.v : design/rom.mem design/*.v
- $(IV) -Iinclude/ -E $(filter %.v,$^) \
+design.v : design/rom.mem design/*.v design/font.mem
+ $(IV) $(IVFLAGS) -E $(filter %.v,$^) \
-DROM_WORDS_COUNT=$(call FILE_LINES,$<) -o $@
-design.json : design.v design/rom.mem design/font.mem
- $(YOSYS) -p 'read_verilog -defer $<' \
- -p 'synth_ice40 -top $(TOPMODULE) -json $@'
-
-design.asc : design.json $(PCF)
- $(PNR) --hx8k --asc $@ --pcf $(PCF) --json $< --package ct256
-
-design.bin : design.asc
- $(ICEPACK) $< $@
+# Yosys synthesis (generates design.json), NextPNR routing (generates
+# design.asc), bitstream generation (generates design.bin) and programming
+# were moved to Makefile.util, so that they can be reused in examples.
timing.rpt : design.asc
$(ICETIME) -d hx8k -mtr $@ $<
-prog : design.bin
- sudo iceprogduino $<
-
CALL_TESTS = \
cd tests/; \
@@ -65,18 +59,26 @@ wasm_compile_test :
$(TEST_TARGETS) : test_% :
$(MAKE) -C tests/$*
+$(EXAMPLE_SIM_TARGETS) : simulate_% :
+ $(MAKE) -C examples/$*
-tools : $(TOOLS_TARGETS)
+$(EXAMPLE_BUILD_TARGETS) : build_% :
+ $(MAKE) -C examples/$* design.bin
+
+$(EXAMPLE_PROG_TARGETS) : prog_% :
+ $(MAKE) -C examples/$* prog
-$(TOOLS_TARGETS) : tools/% :
- $(MAKE) -C tools/ $*
+tools : $(TOOLS_TARGETS)
clean :
- for TEST in tests/*; do $(MAKE) -C $$TEST clean >/dev/null; done
- rm $(GENERATED_MEM_FILES) 2>/dev/null || true
+ for TEST in tests/*/; do $(MAKE) -C $$TEST clean >/dev/null; done
+ for EXAMP in examples/*/; do $(MAKE) -C $$EXAMP clean > /dev/null; done
+ rm $(call FIND_GENERATED_FILES,design/) 2>/dev/null || true
$(MAKE) -C tools/ clean >/dev/null
- rm $(addprefix design.,v json asc bin) timing.rpt 2>/dev/null || true
+ rm $(addprefix design.,v json asc bin) timing.rpt \
+ $(addsuffix .log,yosys pnr) 2>/dev/null || true
-.PHONY : all tools test quicktest stack_machine_test stack_machine_quicktest \
- wasm_compile_test $(TEST_TARGETS) $(TOOLS_TARGETS) tools
+.PHONY : def tools test quicktest stack_machine_test stack_machine_quicktest \
+ wasm_compile_test $(TEST_TARGETS) $(TOOLS_TARGETS) tools \
+ $(EXAMPLE_SIM_TARGETS) $(EXAMPLE_BUILD_TARGETS) $(EXAMPLE_PROG_TARGETS)