From c77286c6951223be1c216c19278cecca3b43ceb5 Mon Sep 17 00:00:00 2001
From: Wojtek Kosior <kwojtus@protonmail.com>
Date: Wed, 15 Jan 2020 16:30:05 +0100
Subject: for safety - invalidate caches when creating a new mapping

---
 src/arm/PL1/kernel/paging.c | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'src')

diff --git a/src/arm/PL1/kernel/paging.c b/src/arm/PL1/kernel/paging.c
index 4c3dccf..6da9905 100644
--- a/src/arm/PL1/kernel/paging.c
+++ b/src/arm/PL1/kernel/paging.c
@@ -242,6 +242,14 @@ uint16_t claim_and_map_section
   // write modified descriptor to the table
   *section_entry = descriptor;
   
+  // invalidate instruction cache
+  asm("mcr p15, 0, r0, c7, c5, 0\n\r" // r0 gets ignored
+      "isb" ::: "memory");
+
+  // invalidate branch-prediction
+  asm("mcr p15, 0, r0, c7, c5, 6\n\r" // r0 - same as above
+      "isb" ::: "memory");
+
   // invalidate main Translation Lookup Buffer
   asm("mcr p15, 0, r1, c8, c7, 0\n\r"
       "isb" ::: "memory");
-- 
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