From 13199395faf225fe78d2ef4540ea3e75edb4e640 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Tue, 31 Dec 2019 23:12:54 +0100 Subject: GPU clock stuff (probably not to be finished...) --- bcmclock.h | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 bcmclock.h (limited to 'bcmclock.h') diff --git a/bcmclock.h b/bcmclock.h new file mode 100644 index 0000000..7fd192d --- /dev/null +++ b/bcmclock.h @@ -0,0 +1,53 @@ +#ifndef BCMCLOCK_H +#define BCMCLOCK_H + +#include + +#include "global.h" + +#define ST_BASE (PERIF_BASE + 0x3000) // System Timer + +#define ST_CS (ST_BASE + 0x0) // System Timer Control/Status +#define ST_CLO (ST_BASE + 0x4) // System Timer Counter Lower 32 bits +#define ST_CHI (ST_BASE + 0x8) // System Timer Counter Higher 32 bits +#define ST_C0 (ST_BASE + 0xC) // System Timer Compare 0 +#define ST_C1 (ST_BASE + 0x10) // System Timer Compare 1 +#define ST_C2 (ST_BASE + 0x14) // System Timer Compare 2 +#define ST_C3 (ST_BASE + 0x18) // System Timer Compare 3 + +// ARM control block +// called "base address for the ARM interrupt register" elsewhere +#define ARM_BASE (PERIF_BASE + 0xB000) + +#define ARM_IRQ_BASIC_PENDING (ARM_BASE + 0x200) +#define ARM_IRQ_PENDING_1 (ARM_BASE + 0x204) +#define ARM_IRQ_PENDING_2 (ARM_BASE + 0x208) +#define ARM_FIQ_CONTROL (ARM_BASE + 0x20C) +#define ARM_ENABLE_IRQS_1 (ARM_BASE + 0x210) +#define ARM_ENABLE_IRQS_2 (ARM_BASE + 0x214) +#define ARM_ENABLE_BASIC_IRQS (ARM_BASE + 0x218) +#define ARM_DISABLE_IRQS_1 (ARM_BASE + 0x21C) +#define ARM_DISABLE_IRQS_2 (ARM_BASE + 0x220) +#define ARM_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) + + +static inline void enable_timer_irq(void) +{ + *(uint32_t volatile*) ARM_ENABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) ARM_ENABLE_IRQS_1 = 1 << 2; +} + +static inline void disable_timer_irq(void) +{ + *(uint32_t volatile*) ARM_DISABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) ARM_DISABLE_IRQS_1 = 1 << 2; +} + +static inline void set_timer_match_timeout(uint32_t timeout) +{ + uint32_t clock_now = *(uint32_t volatile*) ST_CLO; + *(uint32_t volatile*) ST_C2 = clock_now + timeout; + *(uint32_t volatile*) ST_CS = 1 << 2; +} + +#endif // BCMCLOCK_H -- cgit v1.2.3 From fc852b23608c2162b264302e6f48e5f8b3b0b512 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Tue, 31 Dec 2019 23:32:42 +0100 Subject: move ARM_BASE definition to global.h --- bcmclock.h | 4 ---- global.h | 4 ++++ 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'bcmclock.h') diff --git a/bcmclock.h b/bcmclock.h index 7fd192d..40d0559 100644 --- a/bcmclock.h +++ b/bcmclock.h @@ -15,10 +15,6 @@ #define ST_C2 (ST_BASE + 0x14) // System Timer Compare 2 #define ST_C3 (ST_BASE + 0x18) // System Timer Compare 3 -// ARM control block -// called "base address for the ARM interrupt register" elsewhere -#define ARM_BASE (PERIF_BASE + 0xB000) - #define ARM_IRQ_BASIC_PENDING (ARM_BASE + 0x200) #define ARM_IRQ_PENDING_1 (ARM_BASE + 0x204) #define ARM_IRQ_PENDING_2 (ARM_BASE + 0x208) diff --git a/global.h b/global.h index 202ca85..34867a1 100644 --- a/global.h +++ b/global.h @@ -23,4 +23,8 @@ // (as in sane kernels - like linux, not like in wiki.osdev codes...) #define GPIO_BASE (PERIF_BASE + 0x200000) +// ARM control block +// called "base address for the ARM interrupt register" elsewhere +#define ARM_BASE (PERIF_BASE + 0xB000) + #endif // GLOBAL_H -- cgit v1.2.3 From f762c5c65ff9578e4c365320bd89deb34912a047 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Tue, 31 Dec 2019 23:34:43 +0100 Subject: more uniqe constant naming --- bcmclock.h | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) (limited to 'bcmclock.h') diff --git a/bcmclock.h b/bcmclock.h index 40d0559..345ff60 100644 --- a/bcmclock.h +++ b/bcmclock.h @@ -15,28 +15,28 @@ #define ST_C2 (ST_BASE + 0x14) // System Timer Compare 2 #define ST_C3 (ST_BASE + 0x18) // System Timer Compare 3 -#define ARM_IRQ_BASIC_PENDING (ARM_BASE + 0x200) -#define ARM_IRQ_PENDING_1 (ARM_BASE + 0x204) -#define ARM_IRQ_PENDING_2 (ARM_BASE + 0x208) -#define ARM_FIQ_CONTROL (ARM_BASE + 0x20C) -#define ARM_ENABLE_IRQS_1 (ARM_BASE + 0x210) -#define ARM_ENABLE_IRQS_2 (ARM_BASE + 0x214) -#define ARM_ENABLE_BASIC_IRQS (ARM_BASE + 0x218) -#define ARM_DISABLE_IRQS_1 (ARM_BASE + 0x21C) -#define ARM_DISABLE_IRQS_2 (ARM_BASE + 0x220) -#define ARM_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) +#define BCMCLK_IRQ_BASIC_PENDING (ARM_BASE + 0x200) +#define BCMCLK_IRQ_PENDING_1 (ARM_BASE + 0x204) +#define BCMCLK_IRQ_PENDING_2 (ARM_BASE + 0x208) +#define BCMCLK_FIQ_CONTROL (ARM_BASE + 0x20C) +#define BCMCLK_ENABLE_IRQS_1 (ARM_BASE + 0x210) +#define BCMCLK_ENABLE_IRQS_2 (ARM_BASE + 0x214) +#define BCMCLK_ENABLE_BASIC_IRQS (ARM_BASE + 0x218) +#define BCMCLK_DISABLE_IRQS_1 (ARM_BASE + 0x21C) +#define BCMCLK_DISABLE_IRQS_2 (ARM_BASE + 0x220) +#define BCMCLK_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) static inline void enable_timer_irq(void) { - *(uint32_t volatile*) ARM_ENABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) ARM_ENABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) BCMCLK_ENABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) BCMCLK_ENABLE_IRQS_1 = 1 << 2; } static inline void disable_timer_irq(void) { - *(uint32_t volatile*) ARM_DISABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) ARM_DISABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) BCMCLK_DISABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) BCMCLK_DISABLE_IRQS_1 = 1 << 2; } static inline void set_timer_match_timeout(uint32_t timeout) -- cgit v1.2.3 From 0e136bc41b1edcc146a075e0e1e41bfdbd37e572 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Tue, 31 Dec 2019 23:39:48 +0100 Subject: more uniqe function naming --- bcmclock.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'bcmclock.h') diff --git a/bcmclock.h b/bcmclock.h index 345ff60..e4edb57 100644 --- a/bcmclock.h +++ b/bcmclock.h @@ -27,19 +27,19 @@ #define BCMCLK_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) -static inline void enable_timer_irq(void) +static inline void bcmclk_enable_timer_irq(void) { *(uint32_t volatile*) BCMCLK_ENABLE_BASIC_IRQS = 1; *(uint32_t volatile*) BCMCLK_ENABLE_IRQS_1 = 1 << 2; } -static inline void disable_timer_irq(void) +static inline void bcmclk_disable_timer_irq(void) { *(uint32_t volatile*) BCMCLK_DISABLE_BASIC_IRQS = 1; *(uint32_t volatile*) BCMCLK_DISABLE_IRQS_1 = 1 << 2; } -static inline void set_timer_match_timeout(uint32_t timeout) +static inline void bcmclk_set_timer_match_timeout(uint32_t timeout) { uint32_t clock_now = *(uint32_t volatile*) ST_CLO; *(uint32_t volatile*) ST_C2 = clock_now + timeout; -- cgit v1.2.3 From 1d7ff3bda9b6cbd15deadc1b440d9c02113beec6 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Thu, 2 Jan 2020 13:40:19 +0100 Subject: change naming of functions scheduling timer irq for a specified time from now --- armclock.h | 2 +- bcmclock.h | 2 +- demo_functionality.c | 2 +- interrupts.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'bcmclock.h') diff --git a/armclock.h b/armclock.h index 700879a..bf225b0 100644 --- a/armclock.h +++ b/armclock.h @@ -58,7 +58,7 @@ static inline void armclk_disable_timer_irq(void) *(uint32_t volatile*) BCMCLK_DISABLE_BASIC_IRQS = 1; } -static inline void armclk_set_timer_match_timeout(uint32_t timeout) +static inline void armclk_irq_settimeout(uint32_t timeout) { *(uint32_t volatile*) ARMCLK_IRQ_CLR_ACK = 0; *(uint32_t volatile*) ARMCLK_LOAD = timeout; diff --git a/bcmclock.h b/bcmclock.h index e4edb57..75a3b07 100644 --- a/bcmclock.h +++ b/bcmclock.h @@ -39,7 +39,7 @@ static inline void bcmclk_disable_timer_irq(void) *(uint32_t volatile*) BCMCLK_DISABLE_IRQS_1 = 1 << 2; } -static inline void bcmclk_set_timer_match_timeout(uint32_t timeout) +static inline void bcmclk_irq_settimeout(uint32_t timeout) { uint32_t clock_now = *(uint32_t volatile*) ST_CLO; *(uint32_t volatile*) ST_C2 = clock_now + timeout; diff --git a/demo_functionality.c b/demo_functionality.c index a2d8550..1ef91a1 100644 --- a/demo_functionality.c +++ b/demo_functionality.c @@ -126,7 +126,7 @@ void demo_go_unprivileged(void) puts("All ready, jumping to PL0 code"); - armclk_set_timer_match_timeout(0x00100000); + armclk_irq_settimeout(0x00100000); asm volatile("cps %[sysmode]\n\r" "mov sp, %[stackaddr]\n\r" diff --git a/interrupts.c b/interrupts.c index 62c644b..f4192a0 100644 --- a/interrupts.c +++ b/interrupts.c @@ -62,7 +62,7 @@ void irq_handler(void) if (armclk_irq_pending()) { puts("<>"); - armclk_set_timer_match_timeout(0x00100000); + armclk_irq_settimeout(0x00100000); } else { -- cgit v1.2.3 From 7da46d099e1d1909bf5d09ecedfea21481a7a3b9 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Thu, 2 Jan 2020 13:43:06 +0100 Subject: move general irq register definitions to global.h --- armclock.h | 7 ++----- bcmclock.h | 20 ++++---------------- global.h | 11 +++++++++++ 3 files changed, 17 insertions(+), 21 deletions(-) (limited to 'bcmclock.h') diff --git a/armclock.h b/armclock.h index bf225b0..3e65d27 100644 --- a/armclock.h +++ b/armclock.h @@ -16,9 +16,6 @@ #define ARMCLK_LOAD_PRE_DRIVER (ARM_BASE + 0x41C) #define ARMCLK_LOAD_FREE_RUNNING_COUNTER (ARM_BASE + 0x420) -#define BCMCLK_ENABLE_BASIC_IRQS (ARM_BASE + 0x218) -#define BCMCLK_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) - typedef union armclk_control { uint32_t raw; @@ -50,12 +47,12 @@ static inline void armclk_init(void) static inline void armclk_enable_timer_irq(void) { - *(uint32_t volatile*) BCMCLK_ENABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) ARM_ENABLE_BASIC_IRQS = 1; } static inline void armclk_disable_timer_irq(void) { - *(uint32_t volatile*) BCMCLK_DISABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) ARM_DISABLE_BASIC_IRQS = 1; } static inline void armclk_irq_settimeout(uint32_t timeout) diff --git a/bcmclock.h b/bcmclock.h index 75a3b07..b54c39a 100644 --- a/bcmclock.h +++ b/bcmclock.h @@ -15,28 +15,16 @@ #define ST_C2 (ST_BASE + 0x14) // System Timer Compare 2 #define ST_C3 (ST_BASE + 0x18) // System Timer Compare 3 -#define BCMCLK_IRQ_BASIC_PENDING (ARM_BASE + 0x200) -#define BCMCLK_IRQ_PENDING_1 (ARM_BASE + 0x204) -#define BCMCLK_IRQ_PENDING_2 (ARM_BASE + 0x208) -#define BCMCLK_FIQ_CONTROL (ARM_BASE + 0x20C) -#define BCMCLK_ENABLE_IRQS_1 (ARM_BASE + 0x210) -#define BCMCLK_ENABLE_IRQS_2 (ARM_BASE + 0x214) -#define BCMCLK_ENABLE_BASIC_IRQS (ARM_BASE + 0x218) -#define BCMCLK_DISABLE_IRQS_1 (ARM_BASE + 0x21C) -#define BCMCLK_DISABLE_IRQS_2 (ARM_BASE + 0x220) -#define BCMCLK_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) - - static inline void bcmclk_enable_timer_irq(void) { - *(uint32_t volatile*) BCMCLK_ENABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) BCMCLK_ENABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) ARM_ENABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) ARM_ENABLE_IRQS_1 = 1 << 2; } static inline void bcmclk_disable_timer_irq(void) { - *(uint32_t volatile*) BCMCLK_DISABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) BCMCLK_DISABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) ARM_DISABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) ARM_DISABLE_IRQS_1 = 1 << 2; } static inline void bcmclk_irq_settimeout(uint32_t timeout) diff --git a/global.h b/global.h index 34867a1..f5fe9a6 100644 --- a/global.h +++ b/global.h @@ -27,4 +27,15 @@ // called "base address for the ARM interrupt register" elsewhere #define ARM_BASE (PERIF_BASE + 0xB000) +#define ARM_IRQ_BASIC_PENDING (ARM_BASE + 0x200) +#define ARM_IRQ_PENDING_1 (ARM_BASE + 0x204) +#define ARM_IRQ_PENDING_2 (ARM_BASE + 0x208) +#define ARM_FIQ_CONTROL (ARM_BASE + 0x20C) +#define ARM_ENABLE_IRQS_1 (ARM_BASE + 0x210) +#define ARM_ENABLE_IRQS_2 (ARM_BASE + 0x214) +#define ARM_ENABLE_BASIC_IRQS (ARM_BASE + 0x218) +#define ARM_DISABLE_IRQS_1 (ARM_BASE + 0x21C) +#define ARM_DISABLE_IRQS_2 (ARM_BASE + 0x220) +#define ARM_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) + #endif // GLOBAL_H -- cgit v1.2.3 From 6bf5a3b8c6e8a5d1cb3fb4880a5d9688ab094c62 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Thu, 2 Jan 2020 13:47:05 +0100 Subject: use clock3; don't write to registers of arm timer (former mistake) --- bcmclock.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'bcmclock.h') diff --git a/bcmclock.h b/bcmclock.h index b54c39a..dd7136b 100644 --- a/bcmclock.h +++ b/bcmclock.h @@ -17,21 +17,19 @@ static inline void bcmclk_enable_timer_irq(void) { - *(uint32_t volatile*) ARM_ENABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) ARM_ENABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) ARM_ENABLE_IRQS_1 = 1 << 3; } static inline void bcmclk_disable_timer_irq(void) { - *(uint32_t volatile*) ARM_DISABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) ARM_DISABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) ARM_DISABLE_IRQS_1 = 1 << 3; } static inline void bcmclk_irq_settimeout(uint32_t timeout) { uint32_t clock_now = *(uint32_t volatile*) ST_CLO; - *(uint32_t volatile*) ST_C2 = clock_now + timeout; - *(uint32_t volatile*) ST_CS = 1 << 2; + *(uint32_t volatile*) ST_C3 = clock_now + timeout; + *(uint32_t volatile*) ST_CS = 1 << 3; } #endif // BCMCLOCK_H -- cgit v1.2.3