From 9ed55d7612be0ffd17e3e9cc08bea7225470ee67 Mon Sep 17 00:00:00 2001 From: Wojtek Kosior Date: Thu, 16 Jan 2020 16:19:00 +0100 Subject: START explaining makefile --- Makefile-explained.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 Makefile-explained.txt diff --git a/Makefile-explained.txt b/Makefile-explained.txt new file mode 100644 index 0000000..c199059 --- /dev/null +++ b/Makefile-explained.txt @@ -0,0 +1,13 @@ +Our project contains 2 Makefiles: one in it's root directory and one in build/. The reason is that it is possible to use Makefile to simply, elegantly and efficiently produce files in the same directory where it is, but to produce files in directory other than Makefile's own, it requires this directory to be specified in many rules across the Makefile and in general it complicates things. Also, a problem arises when trying to link objects not from within the current directory. If an object is referenced by name in linker script (which is a frequent practice in our scripts) and is passed to gcc with a path, then it'd need to also appear with that path in the linker script. +Because of that a Makefile in build/ is present, that produces files into it's own directory and the Makefile in project's root is used as a proxy to that first one - it calls make recursively in build/ with the same target it was called with. + +From now on only Makefile in build/ will be discussed. + +In the Makefile, variables with the names of certain tools and their command line flags are defined (using =? assignment, which allows one to specify their own value of that variable on the command line). In case a cross-compiler with a different triple should be used, ARM_BASE, normally set to arm-none-eabi, can be set to something like arm-linux-gnueabi or even /usr/local/bin/arm-none-eabi. + +All variables discussed below are defined using := assignment, which causes them to only be evaluated once instead of on every reference to them. + +Objects that should be linked together to create each of the .elf files are listed in their respective variables. I.e. objects to be used for creating kernel_stage2.elf are all listed in KERNEL_STAGE2_OBJECTS. When adding a new source file to the kernel, it is enough to add it's respective .o file to that list to make it compile and link properly. No other Makefile modifications are needed. +In a simillar fashion, RAMFS_FILES variable specifies files, that should be put in the ramfs image, that will be embedded in the kernel. Adding another file only requires listing it there. However, if the file is to be found somewhere else that build/, it might be useful to use the vpath directive to tell make where to look for it. + +Variables dirs and dirs_colon are defined to -- cgit v1.2.3