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-rw-r--r--Various-random-things-explained-I-dont-feel-like-creating-a-separate-txt-for-each-or-ordering-them-in-any-way.txt11
1 files changed, 11 insertions, 0 deletions
diff --git a/Various-random-things-explained-I-dont-feel-like-creating-a-separate-txt-for-each-or-ordering-them-in-any-way.txt b/Various-random-things-explained-I-dont-feel-like-creating-a-separate-txt-for-each-or-ordering-them-in-any-way.txt
index cd69b45..af333fd 100644
--- a/Various-random-things-explained-I-dont-feel-like-creating-a-separate-txt-for-each-or-ordering-them-in-any-way.txt
+++ b/Various-random-things-explained-I-dont-feel-like-creating-a-separate-txt-for-each-or-ordering-them-in-any-way.txt
@@ -14,3 +14,14 @@ TODOs
Contains what the name suggests, in plain text. It lists things that can be implemented or improvemed, as well as tasks, that were once listed and have since been completed (in which case they're marked as done).
<mention us as authors somewhere in documentation, give contact information>
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+
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+Several timers are available on the RaspberryPi:
+1. System Timer (with 4 interrupt lines, regarded as the most reliable, as it is not derived from the system clock and hence is not affecter by processor power mode changes) <link to BMC2837..., possibly mark that it's chapter 12>
+2. ARM side Timer (based on a ARM AP804) <link to BMC2837..., possibly mark that it's chapter 14>
+3. ARM Generic Timer (optional extension to ARMv7-A and ARMv7-R, configured through coprocessor registers) <link to ARMv7ar_arm, possibly mark that it's chapter B8>
+
+At first, we attempted to use the System Timer, some code for which is still present in src/arm/PL1/kernel/bcmclock.h. The interrupts from that timer are not, however, routed to any ARM core under rpi-open-firmware, but rather to the GPU. Because of that, we ended using the ARM side Timer (programmed in src/arm/PL1/kernel/armclock.h).
+The ARM side Timer based on ARM AP804 is currently only available on real hardware and not in qemu. Programming the ARM Generic Timer (listed in TODOs) could enable the use of timer interrupts in qemu.