diff options
| author | Wojtek Kosior <kwojtus@protonmail.com> | 2020-01-15 16:30:05 +0100 |
|---|---|---|
| committer | Wojtek Kosior <kwojtus@protonmail.com> | 2020-01-15 16:30:05 +0100 |
| commit | c77286c6951223be1c216c19278cecca3b43ceb5 (patch) | |
| tree | e44cbd48ed9d1acacbd531830c34a8a1f57587a7 /src/arm/PL1 | |
| parent | c7b47accc6de3521f10c323983a1b325a60fb421 (diff) | |
| download | rpi-MMU-example-c77286c6951223be1c216c19278cecca3b43ceb5.tar.gz rpi-MMU-example-c77286c6951223be1c216c19278cecca3b43ceb5.zip | |
for safety - invalidate caches when creating a new mapping
Diffstat (limited to 'src/arm/PL1')
| -rw-r--r-- | src/arm/PL1/kernel/paging.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/arm/PL1/kernel/paging.c b/src/arm/PL1/kernel/paging.c index 4c3dccf..6da9905 100644 --- a/src/arm/PL1/kernel/paging.c +++ b/src/arm/PL1/kernel/paging.c @@ -242,6 +242,14 @@ uint16_t claim_and_map_section // write modified descriptor to the table *section_entry = descriptor; + // invalidate instruction cache + asm("mcr p15, 0, r0, c7, c5, 0\n\r" // r0 gets ignored + "isb" ::: "memory"); + + // invalidate branch-prediction + asm("mcr p15, 0, r0, c7, c5, 6\n\r" // r0 - same as above + "isb" ::: "memory"); + // invalidate main Translation Lookup Buffer asm("mcr p15, 0, r1, c8, c7, 0\n\r" "isb" ::: "memory"); |