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authorvetch <vetch97@gmail.com>2020-01-18 19:13:17 +0100
committervetch <vetch97@gmail.com>2020-01-18 19:13:17 +0100
commitf540834c09905f848139371005d077577eabdd57 (patch)
tree7420a43e63be72a0c860f325ea65aed603aee65f /src/arm/PL1/kernel
parentdfd6177fea6769a0e7dcd2d2205e5a795bba3553 (diff)
parentf5c83b679ced1d1900613e049c31ad56cf903c1e (diff)
downloadrpi-MMU-example-f540834c09905f848139371005d077577eabdd57.tar.gz
rpi-MMU-example-f540834c09905f848139371005d077577eabdd57.zip
Merge branch 'bob' of https://repo.or.cz/RPi-MMU-example into alice
Diffstat (limited to 'src/arm/PL1/kernel')
-rw-r--r--src/arm/PL1/kernel/interrupt_vector.S5
-rw-r--r--src/arm/PL1/kernel/interrupts.c12
-rw-r--r--src/arm/PL1/kernel/kernel.ld2
-rw-r--r--src/arm/PL1/kernel/kernel_stage2.ld2
-rw-r--r--src/arm/PL1/kernel/ramfs.c27
-rw-r--r--src/arm/PL1/kernel/scheduler.c4
6 files changed, 10 insertions, 42 deletions
diff --git a/src/arm/PL1/kernel/interrupt_vector.S b/src/arm/PL1/kernel/interrupt_vector.S
index 1ec80f7..3afc193 100644
--- a/src/arm/PL1/kernel/interrupt_vector.S
+++ b/src/arm/PL1/kernel/interrupt_vector.S
@@ -8,9 +8,12 @@ _interrupt_vectors:
b irq_handler_caller
b fiq_handler_caller
+// from what I've heard, reset is never used on the Pi;
+// in our case it should run once - when stage1 of the kernel
+// jumps to stage2
reset_handler_caller:
ldr sp, =_supervisor_stack_top
- ldr r5, =reset_handler
+ ldr r5, =setup
bx r5
undef_handler_caller:
diff --git a/src/arm/PL1/kernel/interrupts.c b/src/arm/PL1/kernel/interrupts.c
index 5695e6f..6f61615 100644
--- a/src/arm/PL1/kernel/interrupts.c
+++ b/src/arm/PL1/kernel/interrupts.c
@@ -4,17 +4,6 @@
#include "armclock.h"
#include "scheduler.h"
-// defined in setup.c
-void __attribute__((noreturn)) setup(void);
-
-// from what I've heard, reset is never used on the Pi;
-// in our case it should run once - when stage1 of the kernel
-// jumps to stage2
-void reset_handler(void)
-{
- setup();
-}
-
void undefined_instruction_vector(void)
{
error("Undefined instruction occured");
@@ -85,6 +74,7 @@ void irq_handler(uint32_t regs[14])
if (read_SPSR().fields.PSR_MODE_4_0 != MODE_USER)
{
+ // TODO set supervisor mode's stack pointer
write_SPSR(PL1_PSR);
asm volatile("mov lr, %0\n\r"
"subs pc, lr, #0" ::
diff --git a/src/arm/PL1/kernel/kernel.ld b/src/arm/PL1/kernel/kernel.ld
index 3130634..5ccce06 100644
--- a/src/arm/PL1/kernel/kernel.ld
+++ b/src/arm/PL1/kernel/kernel.ld
@@ -16,7 +16,7 @@ ENTRY(_boot) /* defined in boot.S; qemu needs it to run elf file */
SECTIONS
{
- . = 0x8000;
+ . = 0x8000; /* irrelevant */
__start = .;
.kernel_stage1 :
diff --git a/src/arm/PL1/kernel/kernel_stage2.ld b/src/arm/PL1/kernel/kernel_stage2.ld
index 9411ca2..2858355 100644
--- a/src/arm/PL1/kernel/kernel_stage2.ld
+++ b/src/arm/PL1/kernel/kernel_stage2.ld
@@ -1,4 +1,4 @@
-/* This sesond stage of the kernel is run from address 0x0 */
+/* This second stage of the kernel is run from address 0x0 */
TRANSLATION_TABLE_SIZE = 4096 * 4;
SECTIONS_LIST_SIZE = 4096 * 8;
diff --git a/src/arm/PL1/kernel/ramfs.c b/src/arm/PL1/kernel/ramfs.c
index cc66b4c..ed3ff73 100644
--- a/src/arm/PL1/kernel/ramfs.c
+++ b/src/arm/PL1/kernel/ramfs.c
@@ -3,32 +3,7 @@
#include <stdint.h>
#include "ramfs.h"
-
-static int strcmp(char const *str1, char const *str2)
-{
- while (1)
- {
- int c1 = (unsigned char) *str1, c2 = (unsigned char) *str2;
-
- if (!c1 && !c2)
- return 0;
-
- if (c1 != c2)
- return c1 - c2;
-
- str1++; str2++;
- }
-}
-
-static uint32_t strlen(char const *str1)
-{
- uint32_t len = 0;
-
- while (str1[len])
- len++;
-
- return len;
-}
+#include "strings.h"
static inline char *align4(char *addr)
{
diff --git a/src/arm/PL1/kernel/scheduler.c b/src/arm/PL1/kernel/scheduler.c
index 141ba1d..1db8078 100644
--- a/src/arm/PL1/kernel/scheduler.c
+++ b/src/arm/PL1/kernel/scheduler.c
@@ -24,7 +24,7 @@ _Bool waiting_for_input = 0;
_Bool waiting_for_output = 0;
char waiting_output;
-// 0 is kernel code in system mode is being run
+// 0 if kernel code in system mode is being run
// 1 if our process is being run
// later when we have many processes and this will hold process id
uint32_t current_process;
@@ -126,7 +126,7 @@ void __attribute__((noreturn)) schedule(void)
write_CPSR(new_CPSR);
- asm volatile("wfi");
+ asm volatile("wfi" ::: "memory");
__builtin_unreachable();
}