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| author | Wojtek Kosior <kwojtus@protonmail.com> | 2019-12-31 23:34:43 +0100 |
|---|---|---|
| committer | Wojtek Kosior <kwojtus@protonmail.com> | 2019-12-31 23:34:43 +0100 |
| commit | f762c5c65ff9578e4c365320bd89deb34912a047 (patch) | |
| tree | 52c180afc28e09208bcdaed19999329fdeadf46d | |
| parent | fc852b23608c2162b264302e6f48e5f8b3b0b512 (diff) | |
| download | rpi-MMU-example-f762c5c65ff9578e4c365320bd89deb34912a047.tar.gz rpi-MMU-example-f762c5c65ff9578e4c365320bd89deb34912a047.zip | |
more uniqe constant naming
| -rw-r--r-- | bcmclock.h | 28 |
1 files changed, 14 insertions, 14 deletions
@@ -15,28 +15,28 @@ #define ST_C2 (ST_BASE + 0x14) // System Timer Compare 2 #define ST_C3 (ST_BASE + 0x18) // System Timer Compare 3 -#define ARM_IRQ_BASIC_PENDING (ARM_BASE + 0x200) -#define ARM_IRQ_PENDING_1 (ARM_BASE + 0x204) -#define ARM_IRQ_PENDING_2 (ARM_BASE + 0x208) -#define ARM_FIQ_CONTROL (ARM_BASE + 0x20C) -#define ARM_ENABLE_IRQS_1 (ARM_BASE + 0x210) -#define ARM_ENABLE_IRQS_2 (ARM_BASE + 0x214) -#define ARM_ENABLE_BASIC_IRQS (ARM_BASE + 0x218) -#define ARM_DISABLE_IRQS_1 (ARM_BASE + 0x21C) -#define ARM_DISABLE_IRQS_2 (ARM_BASE + 0x220) -#define ARM_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) +#define BCMCLK_IRQ_BASIC_PENDING (ARM_BASE + 0x200) +#define BCMCLK_IRQ_PENDING_1 (ARM_BASE + 0x204) +#define BCMCLK_IRQ_PENDING_2 (ARM_BASE + 0x208) +#define BCMCLK_FIQ_CONTROL (ARM_BASE + 0x20C) +#define BCMCLK_ENABLE_IRQS_1 (ARM_BASE + 0x210) +#define BCMCLK_ENABLE_IRQS_2 (ARM_BASE + 0x214) +#define BCMCLK_ENABLE_BASIC_IRQS (ARM_BASE + 0x218) +#define BCMCLK_DISABLE_IRQS_1 (ARM_BASE + 0x21C) +#define BCMCLK_DISABLE_IRQS_2 (ARM_BASE + 0x220) +#define BCMCLK_DISABLE_BASIC_IRQS (ARM_BASE + 0x224) static inline void enable_timer_irq(void) { - *(uint32_t volatile*) ARM_ENABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) ARM_ENABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) BCMCLK_ENABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) BCMCLK_ENABLE_IRQS_1 = 1 << 2; } static inline void disable_timer_irq(void) { - *(uint32_t volatile*) ARM_DISABLE_BASIC_IRQS = 1; - *(uint32_t volatile*) ARM_DISABLE_IRQS_1 = 1 << 2; + *(uint32_t volatile*) BCMCLK_DISABLE_BASIC_IRQS = 1; + *(uint32_t volatile*) BCMCLK_DISABLE_IRQS_1 = 1 << 2; } static inline void set_timer_match_timeout(uint32_t timeout) |