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author | vetch <vetch97@gmail.com> | 2019-10-08 16:35:34 +0200 |
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committer | vetch <vetch97@gmail.com> | 2019-10-08 16:35:34 +0200 |
commit | 0fdb28cbb9cd480af25556c0f3abb0e89b25d2cd (patch) | |
tree | 42c5f1c6e9889ef9768a7c137b2b2415bf62ee1f | |
parent | 73d6f1693f0c4023df928363012bee3a6d442a4c (diff) | |
parent | f755e0916a2a40a626d2e8819e303fbfcebb641d (diff) | |
download | rpi-MMU-example-0fdb28cbb9cd480af25556c0f3abb0e89b25d2cd.tar.gz rpi-MMU-example-0fdb28cbb9cd480af25556c0f3abb0e89b25d2cd.zip |
Merge remote-tracking branch 'origin' into alice
-rw-r--r-- | kernel.c | 20 |
1 files changed, 20 insertions, 0 deletions
@@ -10,6 +10,26 @@ void kernel_main(uint32_t r0, uint32_t r1, uint32_t atags) uart_init(); uart_puts("Hello, kernel World!\r\n"); + uint32_t ID_MMFR0; + // get contents of coprocessor register to check for paging support + asm("mrc p15, 0, %0, c0, c1, 4" : "=r" (ID_MMFR0)); + + char *paging; + + uart_puts("hmmm\n\r"); + + switch(ID_MMFR0 & 7) /* lowest 4 bits indicate VMSA support */ { + case 0 : paging = "no paging\n\r"; break; + case 1 : paging = "implementation defined paging\n\r"; break; + case 2 : paging = "VMSAv6, with cache and TLB type registers\n\r"; break; + case 3 : paging = "VMSAv7, with support for remapping and access flag\n\r"; break; + case 4 : paging = "VMSAv7 with PXN bit supported\n\r"; break; + case 5 : paging = "VMSAv7, PXN and long format descriptors. EPAE is supported.\n\r"; break; + default : paging = "?_? unknown paging ?_?\n\r"; + } + + uart_puts(paging); + while (1) uart_putc(uart_getc()); } |