From 85c3a73d3978977a06d679ef5e41eea22fd5ccd7 Mon Sep 17 00:00:00 2001 From: Wojciech Kosior Date: Mon, 7 Sep 2020 17:19:58 +0200 Subject: add a wishbone arbiter for 2 masters --- tests/master_arbiter/operations0.memv | 55 +++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 tests/master_arbiter/operations0.memv (limited to 'tests/master_arbiter/operations0.memv') diff --git a/tests/master_arbiter/operations0.memv b/tests/master_arbiter/operations0.memv new file mode 100644 index 0000000..bc122b2 --- /dev/null +++ b/tests/master_arbiter/operations0.memv @@ -0,0 +1,55 @@ +`include "macroasm.vh" // look into macroasm.vh for more info + +// Those are the operations performed by +// master 0 (the one prioritized by arbiter) +`WRITE(00000, abcd) +`WAIT +`READ (00000, abcd) +`WRITE(00001, 1234) +`READ (00000, abcd) +`DESELECT +`DESELECT +`READ (00001, 1234) +`WRITE(01010, a2a2) +`WRITE(00001, 4321) +`READ (01010, a2a2) +`WAIT +`WAIT +`WAIT +`WAIT +`WAIT +// Only values written until this point will also be checked by master 1 +`DESELECT +`DESELECT +`DESELECT +`WAIT +`DESELECT +// Let's force some interleaved single operations by both masters +`WRITE(0001c, 8a9b) +`DESELECT +`WRITE(0003e, acbd) +`DESELECT +`READ (0003e, acbd) +`DESELECT +`READ (0001c, 8a9b) +`DESELECT +`WRITE(00050, cedf) +`DESELECT +`WRITE(00072, e0f1) +`DESELECT +`READ (00072, e0f1) +`DESELECT +`READ (00050, cedf) +`DESELECT +`WAIT +`READ (00001, 4321) +// The other master should write the values we check below during its first few +// blocks of operations. Although we have no means of synchronizing masters, we +// assume, that when 1 of them does a `DESELECT, other one can take over the +// bus. Because we do have `DESELECTs above, we can expect at least the first +// sets of other master's operations to have completed once we get here. +`READ (30000, 03e8) +`READ (30005, 0403) +`READ (30120, 0120) +`READ (b0005, 22ef) +`READ (3001a, 0a1b) -- cgit v1.2.3