From 96e4965c09bd41f11162120d6312f2aae7efe7ea Mon Sep 17 00:00:00 2001 From: Wojciech Kosior Date: Thu, 31 Dec 2020 17:59:37 +0100 Subject: Add Wishbone datasheets --- design/interface_wrapper.v | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'design/interface_wrapper.v') diff --git a/design/interface_wrapper.v b/design/interface_wrapper.v index ada4a3f..eb708d6 100644 --- a/design/interface_wrapper.v +++ b/design/interface_wrapper.v @@ -1,7 +1,11 @@ /* - * For now, this wrapper ignores SEL_O signals - we'll update it for - * byte-granular accesses later. + * This module transforms a Wishbone pipelined MASTER interface with 32-bit + * data port and 8-bit granularity into one with 16-bit data port and 16-bit + * granularity. It's just a wrapper, it is not considered a Wishbone SLAVE nor + * MASTER by itself (although it could be presented that way). See Wishbone + * datasheets of data interfaces in stack_machine.v and wrapped_stack_machine.v. */ + `default_nettype none module interface_wrapper -- cgit v1.2.3