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-rw-r--r--design/miscellaneous_slave.v34
1 files changed, 33 insertions, 1 deletions
diff --git a/design/miscellaneous_slave.v b/design/miscellaneous_slave.v
index 7274db7..0be33f2 100644
--- a/design/miscellaneous_slave.v
+++ b/design/miscellaneous_slave.v
@@ -1,5 +1,36 @@
/*
- * This wb slave controls buttons, LEDs (only one LED, actually) and timer.
+ * This wb slave controls a button, a LED and timer.
+ *
+ * | *WISHBONE DATASHEET* |
+ * |---------------------------------------------------------------------------|
+ * | *Description* | *Specification* |
+ * |---------------------------------+-----------------------------------------|
+ * | General description | miscellaneous peripherals core |
+ * |---------------------------------+-----------------------------------------|
+ * | Supported cycles | SLAVE, pipelined READ/WRITE |
+ * |---------------------------------+-----------------------------------------|
+ * | Data port, size | 16-bit |
+ * | Data port, granularity | 16-bit |
+ * | Data port, maximum operand size | 16-bit |
+ * | Data transfer ordering | Big endian and/or little endian |
+ * | Data transfer ordering | Undefined |
+ * | Address port, size | 3 |
+ * |---------------------------------+-----------------------------------------|
+ * | Clock frequency constraints | NONE |
+ * |---------------------------------+-----------------------------------------|
+ * | | *Signal name* | *WISHBONE Equiv.* |
+ * | |------------------+----------------------|
+ * | | ACK_O | ACK_O |
+ * | | ADR_I | ADR_I() |
+ * | Supported signal list and cross | CLK_I | CLK_I |
+ * | reference to equivalent | DAT_I | DAT_I() |
+ * | WISHBONE signals | DAT_O | DAT_O() |
+ * | | STB_I | STB_I |
+ * | | WE_I | WE_I |
+ * | | RST_I | RST_I |
+ * | | STALL_O | STALL_O |
+ * |---------------------------------+-----------------------------------------|
+ * | Special requirements | NONE |
*
* Registers and their addresses:
* button2 clicks - address 1
@@ -28,6 +59,7 @@
* very short or very long times, it might be justifiable to only read one half
* of the timer.
*/
+
`default_nettype none
module miscellaneous_slave