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-rw-r--r--design/interface_wrapper.v8
1 files changed, 6 insertions, 2 deletions
diff --git a/design/interface_wrapper.v b/design/interface_wrapper.v
index ada4a3f..eb708d6 100644
--- a/design/interface_wrapper.v
+++ b/design/interface_wrapper.v
@@ -1,7 +1,11 @@
/*
- * For now, this wrapper ignores SEL_O signals - we'll update it for
- * byte-granular accesses later.
+ * This module transforms a Wishbone pipelined MASTER interface with 32-bit
+ * data port and 8-bit granularity into one with 16-bit data port and 16-bit
+ * granularity. It's just a wrapper, it is not considered a Wishbone SLAVE nor
+ * MASTER by itself (although it could be presented that way). See Wishbone
+ * datasheets of data interfaces in stack_machine.v and wrapped_stack_machine.v.
*/
+
`default_nettype none
module interface_wrapper