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authorWojciech Kosior <kwojtus@protonmail.com>2020-12-24 09:22:34 +0100
committerWojciech Kosior <kwojtus@protonmail.com>2020-12-24 09:22:34 +0100
commitf122fa70e30a7d7744b38fa22bd1d5aa949e8277 (patch)
tree8d0ed8590eb5bb6cbb85ded102a4e4e440f28913 /design
parent6abc6fd5a869976b4e31e12908e835827399deec (diff)
downloadAGH-engineering-thesis-f122fa70e30a7d7744b38fa22bd1d5aa949e8277.tar.gz
AGH-engineering-thesis-f122fa70e30a7d7744b38fa22bd1d5aa949e8277.zip
prepare makefile infrastructure for writing examples
Diffstat (limited to 'design')
-rw-r--r--design/soc.v20
1 files changed, 16 insertions, 4 deletions
diff --git a/design/soc.v b/design/soc.v
index 9b69133..7bf6721 100644
--- a/design/soc.v
+++ b/design/soc.v
@@ -29,14 +29,26 @@
`default_nettype none
`ifndef ROM_WORDS_COUNT
- `error_ROM_WORDS_COUNT_must_be_defined
+ `ifndef SIMULATION
+ `error_ROM_WORDS_COUNT_must_be_defined
; /* Cause syntax error */
+ `endif
+ `define ROM_WORDS_COUNT "whatever"
+`endif
+
+`ifndef FONT_FILE
+ `define FONT_FILE "design/font.mem"
+`endif
+
+`ifndef EMBEDDED_ROM_FILE
+ `define EMBEDDED_ROM_FILE "design/rom.mem"
`endif
module soc
#(
- parameter FONT_FILE = "design/font.mem",
- parameter ROM_FILE = "design/rom.mem"
+ parameter FONT_FILE = `FONT_FILE,
+ parameter ROM_WORDS_COUNT = `ROM_WORDS_COUNT,
+ parameter ROM_FILE = `EMBEDDED_ROM_FILE
)
(
input wire clock_100mhz,
@@ -133,7 +145,7 @@ module soc
embedded_bram_slave
#(
.MEMORY_BLOCKS(2),
- .WORDS_TO_INITIALIZE(`ROM_WORDS_COUNT),
+ .WORDS_TO_INITIALIZE(ROM_WORDS_COUNT),
.INITIAL_CONTENTS_FILE(ROM_FILE)
) slave0
(