aboutsummaryrefslogtreecommitdiff
path: root/design
diff options
context:
space:
mode:
authorWojciech Kosior <kwojtus@protonmail.com>2020-10-06 13:49:30 +0200
committerWojciech Kosior <kwojtus@protonmail.com>2020-10-06 13:49:30 +0200
commit797b5825d2179e3bab22643a6873dc29800e79eb (patch)
treea250f3b74a4fb5cab95e316bebd0485f71c35965 /design
parent1741bee182f115d899bd31642b32f70b0c7ed32f (diff)
downloadAGH-engineering-thesis-797b5825d2179e3bab22643a6873dc29800e79eb.tar.gz
AGH-engineering-thesis-797b5825d2179e3bab22643a6873dc29800e79eb.zip
add relational operations to stack machine
Diffstat (limited to 'design')
-rw-r--r--design/stack_machine.v70
1 files changed, 69 insertions, 1 deletions
diff --git a/design/stack_machine.v b/design/stack_machine.v
index b5c56e6..687168a 100644
--- a/design/stack_machine.v
+++ b/design/stack_machine.v
@@ -54,8 +54,13 @@ module stack_machine_new
reg [31:0] r0;
reg [31:0] r1;
- reg [31:0] im;
+ wire signed [31:0] r0s;
+ wire signed [31:0] r1s;
+ assign r0s = r0;
+ assign r1s = r1;
+
+ reg [31:0] im;
reg im_initialized;
parameter STEP_LOADING_INSTRUCTION = 1'b0;
@@ -243,6 +248,42 @@ module stack_machine_new
assign instr_drop = !set_im && !use_im && stack_shrinks_by_1 &&
instruction[11:0] == 12'd4;
+ wire instr_eq;
+ assign instr_eq = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd7;
+
+ wire instr_lt;
+ assign instr_lt = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd8;
+
+ wire instr_ult;
+ assign instr_ult = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd9;
+
+ wire instr_le;
+ assign instr_le = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd10;
+
+ wire instr_ule;
+ assign instr_ule = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd11;
+
+ wire instr_gt;
+ assign instr_gt = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd12;
+
+ wire instr_ugt;
+ assign instr_ugt = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd13;
+
+ wire instr_ge;
+ assign instr_ge = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd14;
+
+ wire instr_uge;
+ assign instr_uge = !set_im && !use_im && stack_shrinks_by_1 &&
+ instruction[11:0] == 12'd15;
+
wire instr_ret;
assign instr_ret = !set_im && !use_im && stack_shrinks_by_1 &&
instruction[11:0] == 12'b000010000000;
@@ -583,6 +624,33 @@ module stack_machine_new
`SET_PC(im_effective);
end
+ if (instr_eq && arithmetic_uncompleted)
+ r1 <= r0 == r1;
+
+ if (instr_lt && arithmetic_uncompleted)
+ r1 <= r0s < r1s;
+
+ if (instr_ult && arithmetic_uncompleted)
+ r1 <= r0 < r1;
+
+ if (instr_le && arithmetic_uncompleted)
+ r1 <= r0s <= r1s;
+
+ if (instr_ule && arithmetic_uncompleted)
+ r1 <= r0 <= r1;
+
+ if (instr_gt && arithmetic_uncompleted)
+ r1 <= r0s > r1s;
+
+ if (instr_ugt && arithmetic_uncompleted)
+ r1 <= r0 > r1;
+
+ if (instr_ge && arithmetic_uncompleted)
+ r1 <= r0s >= r1s;
+
+ if (instr_uge && arithmetic_uncompleted)
+ r1 <= r0 >= r1;
+
if (instr_ret && arithmetic_uncompleted) begin
r1 <= r0;
`SET_PC(r1);