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author | Wojciech Kosior <kwojtus@protonmail.com> | 2020-11-21 18:43:32 +0100 |
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committer | Wojciech Kosior <kwojtus@protonmail.com> | 2020-11-21 18:43:32 +0100 |
commit | 2878d044c741a708f315c42b1833428fe2d93445 (patch) | |
tree | 7cb388ccbfce69e3125ae803e7342232d886d4fe /design | |
parent | 31e0d5f3a684b2e33f7b74e86b2ab6d30c4d2aba (diff) | |
download | AGH-engineering-thesis-2878d044c741a708f315c42b1833428fe2d93445.tar.gz AGH-engineering-thesis-2878d044c741a708f315c42b1833428fe2d93445.zip |
fix typo in comment
Diffstat (limited to 'design')
-rw-r--r-- | design/embedded_bram_slave.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/design/embedded_bram_slave.v b/design/embedded_bram_slave.v index 3829316..519c772 100644 --- a/design/embedded_bram_slave.v +++ b/design/embedded_bram_slave.v @@ -1,5 +1,5 @@ /* - * This is very to design/slave.v, although with 1 important difference + * This is very similar to design/slave.v, although with 1 important difference * - it's meant to be synthesizable (and use iCE40HX8K's embedded RAM). */ `default_nettype none |